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796 bytes added ,  20:43, 2 June 2008
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== Programming Details ==
 
== Programming Details ==
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The module is implemented as a counter of bytes read with the auto-read interface of the Ethernet Controller chip (EC) starting from the beginning of the header. ''AutoRd'' module is instantiated and is pulsed on each counter click. Upon reading the 15th, the location is checked for match to the board slot's hardwired location (''LocStamp'' port listed below). Upon the 16th byte, the packet type is checked. Packet rejection (skipping in the receive buffer) if performed by writing "00000010" to RXCN (0x11) control register. (See the CP220x manual for more information.) ''wrToAddr'' module is instantiated and is pulsed by the Discard signal which may be turned high at any point of the selection process.
    
Note that after stepping through the 14 bytes of the packet header and reading the first two bytes of the payload it leaves the receive (Rx) buffer pointer on the 17th byte (or 3rd byte of payload). The Soft Reset and Programmer modules can continue reading with the auto-read interface to access the data relevant to them.
 
Note that after stepping through the 14 bytes of the packet header and reading the first two bytes of the payload it leaves the receive (Rx) buffer pointer on the 17th byte (or 3rd byte of payload). The Soft Reset and Programmer modules can continue reading with the auto-read interface to access the data relevant to them.
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* ''state_Q'': [in] (3-bit) state register output
 
* ''state_Q'': [in] (3-bit) state register output
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* ''LocStamp'': [in] 8-bit board location value as hard-coded into the board's slot
    
[[FPGA_Transceiver|Transceiver]] Control Lines
 
[[FPGA_Transceiver|Transceiver]] Control Lines
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* ''TxRx_Dout'': [out] EC control register write value
 
* ''TxRx_Dout'': [out] EC control register write value
 
* ''TxRx_Din'': [in] EC control register return value
 
* ''TxRx_Din'': [in] EC control register return value
* ''TxRx_Done'': [in] "Done" signal from [[FPGA_Transceiver|Transceiver]].
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* ''TxRx_Done'': [in] "Done" signal from [[FPGA_Transceiver|Transceiver]]
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