Changes
Jump to navigation
Jump to search
← Older edit
Newer edit →
Programming the FPGA
(view source)
Revision as of 20:33, 5 July 2007
386 bytes added
,
20:33, 5 July 2007
→Controller
Line 140:
Line 140:
[[Image:Temp Controller Block.JPG|thumb|Temperature sensor controller functional block diagram]]
[[Image:Temp Controller Block.JPG|thumb|Temperature sensor controller functional block diagram]]
+
+
The functional block diagram for the controller is shown to the right. The blocks are:
+
* '''Counter'''
+
** Counts a cycle of 17 pulses; holds ''En'' high for 11 pulses, holds ''CE'' high for 16 pulses.
+
** inputs
+
*** ''Clk'': clock
+
*** ''Rst'': asynchronous, active-low rest
+
*** ''Go'': trigger to begin cycle
+
** outputs
+
*** ''CE'': serial chip enable
+
*** ''En'': internal shift enable
Krueger
461
edits
Navigation menu
Personal tools
Log in
Namespaces
Page
Discussion
Variants
Views
Read
View source
View history
More
Search
Navigation
Main page
Recent changes
Random page
Help about MediaWiki
Tools
Special pages
Printable version