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Programming the FPGA
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Revision as of 20:30, 5 July 2007
307 bytes added
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20:30, 5 July 2007
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Line 127:
Line 127:
** outputs
** outputs
*** ''Err'': error flag
*** ''Err'': error flag
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* '''
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* '''
Shift Reg'''
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** An 11-bit, parallel-in, serial-out shift register that loads when not shifting.
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** inputs
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*** ''Clk'': clock
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*** ''Rst'': asynchronous, active-low reset
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*** ''Sh/Ld'': active-high shift, active-low load
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*** '' Par(10:0)'': 11-bit parallel input bus
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** outputs
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*** ''Ser'': serial output line
=== Controller ===
=== Controller ===
[[Image:Temp Controller Block.JPG|thumb|Temperature sensor controller functional block diagram]]
[[Image:Temp Controller Block.JPG|thumb|Temperature sensor controller functional block diagram]]
Krueger
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