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Line 46: Line 46:  
=== Pinout Table ===
 
=== Pinout Table ===
 
{| cellpadding=3 border=1 |
 
{| cellpadding=3 border=1 |
| '''Pin #'''
+
| '''Pin #''' || '''Net Name''' || '''Signal Name'''
| '''Net Name'''
   
| '''Description'''
 
| '''Description'''
 
|-
 
|-
| P1
+
| P1 || FPGA/TMS ||
| FPGA/TMS
   
| JTAG
 
| JTAG
 
|-
 
|-
22

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