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Line 49: Line 49:  
| '''Description'''
 
| '''Description'''
 
|-
 
|-
| P1 || FPGA/TMS ||  
+
| P1 || FPGA/TMS || [JTAG]
 
| JTAG
 
| JTAG
 
|-
 
|-
| P2
+
| P2 || FPGA/TDI || [JTAG]
| FPGA/TDI
   
| JTAG
 
| JTAG
 
|-
 
|-
| P3
+
| P3 || AD7928/CS || SPI_A_iCS
| AD7928/CS
   
| SPI chip select for ADC
 
| SPI chip select for ADC
 
|-
 
|-
| P4
+
| P4 || SPI || SDO
| SPI
   
| '''Erroneously wired SPI bus trace'''<br>Connects to SDO on temp. sensor and DIN on ADC
 
| '''Erroneously wired SPI bus trace'''<br>Connects to SDO on temp. sensor and DIN on ADC
 
|-
 
|-
| P5
+
| P5 || CLK_5MHZ || SPI_SCLK
| CLK_5MHZ
   
| 5 MHz clock output for SPI bus (ADC and temp. sensor)
 
| 5 MHz clock output for SPI bus (ADC and temp. sensor)
 
|-
 
|-
| P6
+
| P6 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P7
+
| P7 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P8
+
| P8 || DGND ||
| DGND
   
|
 
|
 
|-
 
|-
| P9
+
| P9 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P10
+
| P10 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P11
+
| P11 || +3.3V ||
| +3.3V
   
|
 
|
 
|-
 
|-
| P12
+
| P12 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P13
+
| P13 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P14
+
| P14 || DGND ||
| DGND
   
|
 
|
 
|-
 
|-
| P15
+
| P15 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P16
+
| P16 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P17
+
| P17 || +1.2V ||
| +1.2V
   
|
 
|
 
|-
 
|-
| P18
+
| P18 || DGND ||
| DGND
   
|
 
|
 
|-
 
|-
| P19
+
| P19 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P20
+
| P20 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P21
+
| P21 || No connection ||
| No connection
   
|  
 
|  
 
|-
 
|-
| P22
+
| P22 || +3.3V ||
| +3.3V
   
|
 
|
 
|-
 
|-
| P23
+
| P23 || DGND || [M1: JTAG prog. config.]
| DGND
   
|
 
|
 
|-
 
|-
| P24
+
| P24 || DGND || [M2: JTAG prog. config.]
| DGND
   
|
 
|
 
|-
 
|-
| P25
+
| P25 || DGND || [M0: JTAG prog. config.]
| DGND
   
|
 
|
 
|-
 
|-
| P26
+
| P26 || +3.3V ||
| +3.3V
   
|
 
|
 
|-  
 
|-  
| P27
+
| P27 || FPGA/CLK_IN || fClk
| FPGA/CLK_IN
   
| 20 MHz clock input from crystal oscillator
 
| 20 MHz clock input from crystal oscillator
 
|-
 
|-
| P28
+
| P28 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P29
+
| P29 || No connection || (db) state_Q(0)
| No connection
   
|
 
|
 
|-
 
|-
| P30
+
| P30 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P31
+
| P31 || No connection || (db) state_Q(1)
| No connection
   
|
 
|
 
|-
 
|-
| P32
+
| P32 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P33
+
| P33 || No connection || (db) state_Q(2)
| No connection
   
|
 
|
 
|-
 
|-
| P34
+
| P34 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P35
+
| P35 || CP2201/INT || Eth_iINT
| CP2201/INT
   
| Ethernet controller interrupt
 
| Ethernet controller interrupt
 
|-
 
|-
| P36
+
| P36 || MASTER_RESET || Rst
| MASTER_RESET
   
| Connects to RESET jumper in upper left of board (active-low, externally pulled up)
 
| Connects to RESET jumper in upper left of board (active-low, externally pulled up)
 
|-
 
|-
| P37
+
| P37 || (manually wired) || fClk_out
| No connection
   
|
 
|
 
|-
 
|-
| P38
+
| P38 || +1.2V ||
| +1.2V
   
|
 
|
 
|-
 
|-
| P39
+
| P39 || No connection ||
| No connection
   
|
 
|
 
|-
 
|-
| P40
+
| P40 || CP2201/CS ||
| CP2201/CS
   
| Chip select for ethernet controller
 
| Chip select for ethernet controller
 
|-
 
|-
1,004

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