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SiPM digital control board netlist
(view source)
Revision as of 14:54, 24 June 2008
25 bytes added
,
14:54, 24 June 2008
→IC netlist
:
ADC, DAC clocks
Line 143:
Line 143:
|SCLK
|SCLK
|Clock, 5 MHz, FPGA CLK_OUT
|Clock, 5 MHz, FPGA CLK_OUT
−
|
5MHz
Clock input for serial data output control
+
|Clock input for serial data output control
|----
|----
|AD7928
|AD7928
|1
|1
|SCLK
|SCLK
−
|Clock
+
|Clock
, 5 MHz, FPGA CLK_OUT
|Used for reading data and conversion
|Used for reading data and conversion
|----
|----
Line 154:
Line 154:
|P9
|P9
|SCLK
|SCLK
−
|Clock,
<=30MHz
+
|Clock,
5 MHz, FPGA CLK_OUT
|
|
|----
|----
Underwood
261
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