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<math>V=50 V_{ref}\frac{D}{2^{14}}</math>
<math>V=50 V_{ref}\frac{D}{2^{14}}</math>
where D is the 14-bit binary representation of the voltage value and <math>V_{ref}=3.3V</math> in the current board design, yielding a 0-165V range, assuming the recommended <math>10V+V_{max}=175V</math> power supply is used.
where D is the 14-bit binary representation of the voltage value and V<sub>ref</sub>=3.3V in the current board design, yielding a 0-165V range, assuming the recommended 10V+V<sub>max</sub>=175V power supply is used.
Place holders for all channels must be present in the packet, but only those marked in the mask will be programmed; all other bytes will be ignored and can take on any value. Regardless of the mask, the word corresponding to the ''last channel must be followed but another byte as padding.'' The packet format is shown in detail in the adjacent figure.
Place holders for all channels must be present in the packet, but only those marked in the mask will be programmed; all other bytes will be ignored and can take on any value. Regardless of the mask, the word corresponding to the ''last channel must be followed but another byte as padding.'' The packet format is shown in detail in the adjacent figure.