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SiPM digital control board netlist (view source)
Revision as of 16:49, 24 June 2008
, 16:49, 24 June 2008→Custom I/O pins: note about physical pins
=== Custom I/O pins ===
=== Custom I/O pins ===
For these I/O pins, "Pin Name" defines the name of the pins as they will be used for our project, not the actual pin name in the FPGA schematic.
For these I/O pins, "Pin Name" defines the name of the pins as they will be used for our project, not the actual pin name in the FPGA schematic. The physical FPGA pins used for each of these connections will be determined later to optimize the circuitry around the FPGA.
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