Changes
Jump to navigation
Jump to search
← Older edit
Newer edit →
FPGA Idler
(view source)
Revision as of 18:25, 2 June 2008
13 bytes added
,
18:25, 2 June 2008
m
no edit summary
Line 19:
Line 19:
* ''TxRx_Go'': [out] "Go" signal to read an EC control register byte
* ''TxRx_Go'': [out] "Go" signal to read an EC control register byte
* ''TxRX_RiW'': [out] active-high read, active-low write flag
* ''TxRX_RiW'': [out] active-high read, active-low write flag
−
* ''TxRx_Aout'': [out]
_VECTOR
(
7 downto 0
)
;
+
* ''TxRx_Aout'': [out]
EC control register address
(
8-bit
)
Senderovich
1,004
edits
Navigation menu
Personal tools
Log in
Namespaces
Page
Discussion
Variants
Views
Read
View source
View history
More
Search
Navigation
Main page
Recent changes
Random page
Help about MediaWiki
Tools
Special pages
Printable version