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| − | == (010) Idle ==
  | + | = (010) Idler =  | 
|   |  |   |  | 
| − | Block 010 continuously polls the interrupt registers on the CP2200/1 until the Receive FIFO Empty flag comes back as a zero.  On this condition it transitions to state 011.  | + | The Idler Block corresponding to state 010 continuously is the default module running an "idle process". It awaits an interrupt corresponding to "Receive FIFO non-empty", unpon which it transitions to state 011 - [[FPGA_Reader|Read]].  | 
|   |  |   |  | 
| − | inputs
  |   | 
| − | * ''Clk'': clock
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| − | * ''/Rst'': asynchronous, active-low reset
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| − | * ''state_in'': 3-bit state value
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|   |  |   |  | 
| − | * ''TxRx_D'': 8-bit data from transceiver
  | + | == Programming Details ==  | 
| − | * ''TxRx_Done'': pulse from transceiver to signal transfer complete
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| − | * ''TxRx_Go'': transceiver go line
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| − | * ''TxRx_R/W'': read/write flag for transceiver
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| − | * ''TxRx_Aout'': register address bus for transceiver
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|   |  |   |  | 
|   | + | === Ports ===  | 
|   |  |   |  | 
| − | blocks
  | + | * ''Clk'': [in] clock  | 
| − | * '''Request INT0RD''' (0x76) register via <tt>reqFromAddr</tt> pulsed by the ''LoopEn'' signal from Looper (below).  | + | * ''Rst: [in] asynchronous reset  | 
| − | * '''Looper'''  | + |    | 
| − | ** Switch to determine if this state should loop on itself or continue to the next state.
  | + | * ''Eth_iINT'': [in] EC interrupt pin  | 
| − | ** inputs
  | + | * ''state_in'': [in] 3-bit FPGA state value  | 
| − | *** ''S_En'': state enable
  | + |    | 
| − | *** ''TxRx_Done'': ''Done'' pulse from transceiver
  | + | [[FPGA_Transceiver|Transceiver]] Control Lines  | 
| − | *** ''TxRx_Data'': ''D_out'' bus from transceiver
  | + | * ''TxRx_Din'': [in]  EC control register return value  | 
| − | ** outputs
  | + | * ''TxRx_Done'': [in] "Done" signal from [[FPGA_Transceiver|Transceiver]].  | 
| − | *** ''LoopEn'': pulse to repeat fetch cycle; ''Loop'' <= ''S_En'' and ''TxRx_Done'' and ''TxRx_Data(6)''
  | + | * ''TxRx_Go'': [out] "Go" signal to read an EC control register byte  | 
| − | *** ''Done'': pulse to finish state; connects to state counter as an enable; ''Done'' <= ''S_En'' and ''TxRx_Done'' and not ''TxRx_Data(6)''
  | + | * ''TxRX_RiW'': [out] active-high read, active-low write flag  | 
| − | *** ''New_St'': new state value to load into state register; goes to 011 when ''Done'' is high
  | + | * ''TxRx_Aout'': [out]  _VECTOR (7 downto 0);  |