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** inouts
 
** inouts
 
*** ''AD'': 8-bit address and data bus
 
*** ''AD'': 8-bit address and data bus
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* '''state register'''
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** A three-bit register to store the current state.
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** inputs
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*** ''Clk'': clock
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*** ''/Rst'': asynchronous, active-low reset to zero the register (puts system into reset state)
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*** ''En'': write enable
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*** ''D'': three-bit data-in bus
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** outputs
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*** ''Q'': three-bit data-out bus
    
=== (000) Reset Cycle ===
 
=== (000) Reset Cycle ===
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