Design and prototyping of SiPM electronics
The pages listed here describe the work in electronics undertaken to support Silicon Photomultiplier (SiPM) based readout of the Tagger Microscope for JLab Hall-D and the GlueX experiment in particular. The working design concept for the Tagger's readout involves an array of PCB boards with SiPM's and their amplifier, summing circuits etc. suspended in a light-tight box out of the plane of incoming electrons. Each of these "analog boards" are connected across a light-sealing bus board to a "digital board". The latter principally contains bias voltage control circuitry and an architecture that allows ethernet-based communication with a controlling PC, which will monitors the Tagger and adjust individual channel bias. An added advantage of this two-tier design is the ease with which the tagger can be wired without introducing light leaks: the SiPM signals are passed into a chamber more tolerant of ambient light. (The coaxial then take the signals from the digital boards.)
Internal Links
Analog amplifier
- SiPM Amplifier - analog amplifier circuit supplied by Photonique for use with the SiPMs.
- MATLAB amplifier in detail - more information regarding the implementation of the MATLAB-based simulation of the amplifier circuit.
Digital control
- SiPM digital control board - digital PCB for controlling the SiPMs.
Programming our FPGA
- Programming the FPGA - central page for programming the FPGA.
- Programming the DAC - discussion of the design for the DAC.
- Programming the SPI - discussion of the new hybrid module that controls both the ADC and the temperature sensor over a single SPI bus.
- Programming the temperature sensor - discussion of the design for the temperature sensor.
- Programming the ADC - discussion of the design for the ADC.
- Programming the Ethernet controller - discussion of the design for the Ethernet controller.
- Ethernet packets - a detail of the packets we intend to use on our network.
- Reset and Initialization - discussion of the design for the reset and initialization core.
VHDL in general
- VHDL tutorial - a brief guide to VHDL design with a design example; the introduction and core of the tutorial.
- VHDL: Where to start - section one of the tutorial, focusing on preparing your design for coding.
- VHDL: Enter the code monkey - section two of the tutorial, focusing on outlining the framework of your code.
- VHDL: The real code - section three of the tutorial, focusing on coding the body of your design.
- VHDL: Xilinx ISE - section four of the tutorial, focusing on using the development environment.
To-do list
- Upload ADC module block diagrams
Combine ADC & temperature sensor into single "SPI" module
- Complete Ethernet controller module
RegistersIdlerReaderQuerierProgrammerTransmitterTransceiver, extra debugging quasi-emulators in progress- Reset module
Check all modules for proper async reset supportExecute on startupExecute on commandSoft reset - load and report MAC and location addresses.
- Integrate all modules and simulate the device as a whole
- Determine size of FPGA
- Design or purchase connector to bus board
- Purchase all components (including EEPROM, RJ-45 female jack, etc)
- Obtain footprints of all chips, connectors, jacks, etc
- PCB layout
- Prototype PCB
- Design bus board
- Design analog board