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=== The FPGA ===
 
=== The FPGA ===
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:''See also: [[Programming the FPGA]]''
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[[Image:Spartan.jpg|right]]
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The FPGA is the hub of the digital control board.  All components communicate through the FPGA and are controlled by the FPGA.  The chip we plan to use is the [http://www.xilinx.com/products/silicon_solutions/fpgas/spartan_series/spartan3a_fpgas/index.htm Xilinx Spartan-3A] FPGA.  The Spartan line of FPGAs are low-cost chips well-suited for small designs such as this.  The 3A model is optimized for I/O and includes a large number of I/O pins, which will be beneficial considering the amount of interconnect relative to the amount of logic. A currently open question is which size of FPGA to choose.  The total number of system gates is 50k, 200k, 400k, 700k, or 1400k.  The likely method of choosing the proper FPGA is to design the [http://en.wikipedia.org/wiki/Hardware_description_language HDL] and synthesize it, then decide on a model based on number of logic cells and I/O pins required by the synthesized HDL.
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The FPGA is the hub of the digital control board.  All components communicate through the FPGA and are controlled by the FPGA.  The chip we plan to use is the [http://www.xilinx.com/products/silicon_solutions/fpgas/spartan_series/spartan3a_fpgas/index.htm Xilinx Spartan-3A] FPGA.  The Spartan line of FPGAs are low-cost chips well-suited for small designs such as this.  The 3A model is optimized for I/O and includes a large number of I/O pins, which will be beneficial considering the amount of interconnect relative to the amount of logic. The code for the FPGA has been written in [[VHDL_tutorial|VHDL]] and is in the final stages of debugging. The question as to which size of FPGA to choose from the available 50k-1400k may be settled, as the current design implementation fits within the 50k unit.  
    
The data sheet, user guide, configuration guide, and other documentation regarding the FPGA can be downloaded from the [http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=Publications/FPGA+Device+Families/Spartan-3A Xilinx website].
 
The data sheet, user guide, configuration guide, and other documentation regarding the FPGA can be downloaded from the [http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=Publications/FPGA+Device+Families/Spartan-3A Xilinx website].
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Much of the FPGA programming is concerned with the complex operations of the Ethernet controller chip [[#The Ethernet controller|CP2200/1 discussed below]]. This core interacts with the DAC and SPI (bus for ADC and Temperature sensor) controller modules when access to these chips is required.
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* [[Programming the DAC]]
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* [[Programming the SPI]]
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* [[Programming the Ethernet controller]]
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* [[Reset and Initialization]]
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=== The Ethernet controller ===
 
=== The Ethernet controller ===
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