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Line 77: − == Miscellaneous non-state-based components == − Please refer to the individual design detail pages for: − * [[FPGA_Registers|Registers]] − * [[FPGA_Reusables|Miscellaneous Reusable Components]]
Programming the Ethernet controller (view source)
Revision as of 22:25, 5 June 2008
, 22:25, 5 June 2008no edit summary
As described above, these states form the outline of the functional block diagram. This implementation calls for a central ''state register''. Each block reads the state value in the register and enables itself upon seeing its own value. After completion of its function, a block will write a new value to the state register to enable the next block. With several modules writing to the register, usual precautions must be taken to avoid more than one drivers forcing a line simultaneously. All modules must be designed to go to high impedance on their output lines when they are not active.
As described above, these states form the outline of the functional block diagram. This implementation calls for a central ''state register''. Each block reads the state value in the register and enables itself upon seeing its own value. After completion of its function, a block will write a new value to the state register to enable the next block. With several modules writing to the register, usual precautions must be taken to avoid more than one drivers forcing a line simultaneously. All modules must be designed to go to high impedance on their output lines when they are not active.
== Miscellaneous non-state-based components ==
Please refer to the individual design detail pages for:
* [[FPGA_Registers|Registers]]
* [[FPGA_Reusables|Miscellaneous Reusable Components]]
== Interface ==
== Interface ==
[[Image:DigBoardScheme.png|center]]
[[Image:DigBoardScheme.png|center]]