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Programming the ADC
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Revision as of 01:52, 7 October 2009
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01:52, 7 October 2009
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The VHDL files can be found [http://zeus.phys.uconn.edu/halld/tagger/electronics/design-6-2007/ADC_VHDL.zip here].
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== Interface ==
== Interface ==
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** if 1, analog input range is 0 to V<sub>Reg</sub>
** if 1, analog input range is 0 to V<sub>Reg</sub>
* Coding: set to zero
* Coding: set to zero
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** if 0, output is two's complement
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** if 0, output is two's complement
[http://en.wikipedia.org/wiki/Two%27s_complement]
** if 1, output is binary-coded decimal (BCD)
** if 1, output is binary-coded decimal (BCD)
Senderovich
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