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Line 198: − + Line 216:
Line 216: − + − + Line 228:
Line 228: − + − + − ''Perhaps can be left unconnected during programming???'' − + − + + + + + + + + + + + + +
SiPM digital control board netlist (view source)
Revision as of 19:45, 24 June 2008
, 19:45, 24 June 2008→Configuration Pins: more config pins
|CCLK
|CCLK
|Clock for programming
|Clock for programming
|EEPROM clock input pin
|XCF01S clock input pin
|User I/O
|User I/O
|If M[2:0] define a master mode, CCLK is internally generated<br>If M[2:0] define a slave mode, CCLK is a clock input
|If M[2:0] define a master mode, CCLK is internally generated<br>If M[2:0] define a slave mode, CCLK is a clock input
|DIN
|DIN
|Serial data input
|Serial data input
|EEPROM serial data output
|XCF01S serial data output
|User I/O
|User I/O
|Serial data input from EEPROM - used only in serial [[FPGA programming modes | FPGA programming mode]]
|Serial data input from XCF01S
|----
|----
|DOUT
|DOUT
|VS0
|VS0
|Variant select pin for SPI mode programming
|Variant select pin for SPI mode programming
|Ground
|Not used
|User I/O
|User I/O
| rowspan=3 | Tied low during programming since we are not using SPI mode programming
| rowspan=3 | Not used, since we are not using SPI mode programming
|----
|----
|VS1
|VS1
|Variant select pin for SPI mode programming
|Variant select pin for SPI mode programming
|Ground
|Not used
|User I/O
|User I/O
|----
|----
|VS2
|VS2
|Variant select pin for SPI mode programming
|Variant select pin for SPI mode programming
|Ground
|Not used
|User I/O
|User I/O
|----
|MOSI
|Serial data output to SPI EEPROM
|Not used
|User I/O
|Used for EEPROM read commands in only SPI mode programming<br>Not used in our configuration
|----
|CSO_B
|Chip select output for SPI
|Not used
|User I/O
|Used for SPI mode only
|----
|----
|}
|}