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Line 12:
Line 12: − + − + − + − + − + − + − + − + − + − + − + − + − + − + − + − + − + − + Line 44:
Line 44: − + − + − + − + − + − + − + − +
no edit summary
! style="background: #f2f2f2;"| Serial
! style="background: #f2f2f2;"| Serial
|- style="color: black;"
|- style="color: black;"
| style="background: #f2f2f2;"| CPU (halldtrg5)
| style="background: #f9f9f9;"| CPU (halldtrg5)
| style="background: #f2f2f2;"| 1
| style="background: #f9f9f9;"| 1
| style="background: #f2f2f2;"|
| style="background: #f9f9f9;"|
|-
|-
| style="background: #f2f2f2;"| TI (Old)
| style="background: #f9f9f9;"| TI (Old)
| style="background: #f2f2f2;"| 2
| style="background: #f9f9f9;"| 2
| style="background: #f2f2f2;"|
| style="background: #f9f9f9;"|
|-
|-
| style="background: #f2f2f2;"| FADC250
| style="background: #f9f9f9;"| FADC250
| style="background: #f2f2f2;"| 5
| style="background: #f9f9f9;"| 5
| style="background: #f2f2f2;"| B21595_06R
| style="background: #f9f9f9;"| B21595_06R
|-
|-
| style="background: #f2f2f2;"| SDC
| style="background: #f9f9f9;"| SDC
| style="background: #f2f2f2;"| 9
| style="background: #f9f9f9;"| 9
| style="background: #f2f2f2;"|
| style="background: #f9f9f9;"|
|-
|-
| style="background: #f2f2f2;"| LE discriminator
| style="background: #f9f9f9;"| LE discriminator
| style="background: #f2f2f2;"| 14
| style="background: #f9f9f9;"| 14
| style="background: #f2f2f2;"| C_15
| style="background: #f9f9f9;"| C_15
|-
|-
| style="background: #f2f2f2;"| F1TDC
| style="background: #f9f9f9;"| F1TDC
| style="background: #f2f2f2;"| 16
| style="background: #f9f9f9;"| 16
| style="background: #f2f2f2;"|
| style="background: #f9f9f9;"|
|}
|}
! style="background: #f2f2f2;"| To
! style="background: #f2f2f2;"| To
|-
|-
| style="background: #f2f2f2;"| External trigger
| style="background: #f9f9f9;"| External trigger
| style="background: #f2f2f2;"| TI input, IN1
| style="background: #f9f9f9;"| TI input, IN1
|-
|-
| style="background: #f2f2f2;"| L1 Accept ( 3rd from the bottom )
| style="background: #f9f9f9;"| L1 Accept ( 3rd from the bottom )
| style="background: #f2f2f2;"| SDC TRG
| style="background: #f9f9f9;"| SDC TRG
|-
|-
| style="background: #f2f2f2;"| L1 Accept ( 4 th from the bottom )
| style="background: #f9f9f9;"| L1 Accept ( 4 th from the bottom )
| style="background: #f2f2f2;"| F1TDC TRG
| style="background: #f9f9f9;"| F1TDC TRG
|-
|-
| style="background: #f2f2f2;"| TI Out0
| style="background: #f9f9f9;"| TI Out0
| style="background: #f2f2f2;"| F1TDC SYNC
| style="background: #f9f9f9;"| F1TDC SYNC
|}
|}