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**EEPROM (on left, chip holds the programming in non-volatile memory and programs FPGA on startup)
**EEPROM (on left, chip holds the programming in non-volatile memory and programs FPGA on startup)
**FPGA on right, volatile and forgets its programming at every powerdown
**FPGA on right, volatile and forgets its programming at every powerdown
*Make sure that the digital board has power.
*Select Create PROM file in top left window. Xilinx needs to create a new mcs file out of the bit file before the FPGA can be programmed.
*The following settings should be used when creating the PROM
**Xilinx flash/prom
**PROM family platform flash
**Device xcf01s [1M]. Add if not already there.
**Output file name: fpga
**Save to /TotalTest
**Format mcs
**Don't add non-config data.
**Generate
*Switch back to the boundary scan tab.
*Select EEPROM then select program in the lower left window. Auto-erase normally occurs but if it doesn't, erase and then program.