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Digital control board documentation (view source)
Revision as of 19:08, 16 June 2009
, 19:08, 16 June 2009→Eurocard Connector
== Eurocard Connector ==
== Eurocard Connector ==
At the bottom of the control board is the Eurocard connector. The Eurocard connector connects the board to the backplane and also connects the board to its power supplies. The Eurocard has 48 pins arranged in three rows of 16 pins each. Rows B and C are exclusively used to pass SiPM bias voltages to the backplane as described in
At the bottom of the control board is the Eurocard connector. The Eurocard connector connects the board to the backplane and also connects the board to its power supplies. The Eurocard has 48 pins arranged in three rows of 16 pins each. Rows B and C are exclusively used to pass SiPM bias voltages to the backplane as described in [[#Channel Mapping | DAC Channel Mapping]]. Here is a table describing the purpose of pins in row A:
=== Row A Pinout Table ===
Note that when viewing the top of the board with the Eurocard at the bottom, these pins go from right to left. If you look closely at the pins, you will see that pin A1 has a square pad, unlike the round pads of the others.
{| cellpadding=3 border=1 |
| '''Pin #'''
| '''Net Name'''
| '''Description'''
|-
| A1
| CP2201/LA
| Ethernet link/activity indicator routed to backplane
|-
| A2
| High voltage input (+210V max)
| High voltage input for DAC. See [[#DAC | DAC]] for information about what voltage to input here.
|-
| A3
| -5V
| For DAC
|-
| A4
| +5V
| Powers most things on the board
|-
| A5
| AGND
|
|-
| A6
| DGND
|
|-
| A7
| ADC_EXT1
| Connects to ADC to monitor voltages on amplifier board<br>See [[#ADC | ADC]]
|-
| A8
| ADC_EXT2
| Connects to ADC to monitor voltages on amplifier board<br>See [[#ADC | ADC]]
|-
| A9
| No connection
|
|-
| A10
| No connection
|
|-
| A11
| No conneciton
|
|-
| A12
| ID4
| Location identifier bit 4<br>Used to identify which backplane board is connected to<br>See [[#FPGA | FPGA]]
|-
| A13
| ID3
| Location identifier bit 3<br>Used to identify which backplane board is connected to<br>See [[#FPGA | FPGA]]
|-
| A14
| ID2
| Location identifier bit 2<br>Used to identify which backplane board is connected to<br>See [[#FPGA | FPGA]]
|-
| A15
| ID1
| Location identifier bit 1<br>Used to identify which backplane board is connected to<br>See [[#FPGA | FPGA]]
|-
| A16
| ID0
| Location identifier bit 0<br>Used to identify which backplane board is connected to<br>See [[#FPGA | FPGA]]
|}