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Digital control board documentation (view source)
Revision as of 18:36, 16 June 2009
, 18:36, 16 June 2009→Pinout Table
=== Pinout Table ===
=== Pinout Table ===
{| cellpadding=3 border=1 |
| '''Pin #'''
| '''Net Name'''
| '''Description'''
|-
| 1
| CP2201/LA
| Link/activity indicator<br>Routed to backplane but not implemented<br>See CP2201 data sheet for information on how to connect to an LED
|-
| 2
| DGND
| By the data sheet, this pin should be AGND<br>We deliberately set it to DGND to avoid noise on AGND plane
|-
| 3
| +3.3V
| AV+ power pin
|-
| 4
| CP2201/RX-
| Connects to RX- on ethernet jack
|-
| 5
| CP2201/RX+
| Connects to RX+ on ethernet jack
|-
| 6
| CP2201/TX+
| Connects to TX+ on ethernet jack
|-
| 7
| CP2201/TX-
| Connects to TX- on ethernet jack
|-
| 8
| +3.3V
| "VDD" power pin
|-
| 9
| DGND
| "DGND1" per the data sheet
|-
| 10
| CP2201/RESET
| "RST" per the data sheet<br>Connects to FPGA - should be programmatically triggered upon reset of FPGA by RESET jumper
|-
| 11-18
| CP2201/AD[0:7]
| Bits 0-7 of the address/data bus<br>Connect to FPGA
|-
| 19
| +3.3V
| "VDD" power pin
|-
| 20
| DGND
| "DGND2" per the data sheet
|-
| 21
| CP2201/ALE
| Address line enable<br>Connects to FPGA<br>See CP2201 documentation
|-
| 22
| CP2201/RD
| Read strobe for AD bus<br>Connects to FPGA<br>See CP2201 documentation
|-
| 23
| CP2201/WR
| Write strobe for AD bus<br>Connects to FPGA<br>See CP2201 documentation
|-
| 24
| CP2201/CS
| Chip select<br>Connects to FPGA
|-
| 25
| CP2201/INT
| Interrupt request<br>Connects to FPGA
|-
| 26
| DGND
| "MOTEN" (Motorola enable) per the datasheet<br>Tied low to disable Motorola bus format (enable Intel format)
|-
| 27
| CP2201/XTAL2
| Crystal oscillator driver<br>The CP2201 inverts the 20MHz clock signal and feeds it back to the crystal oscillator to encourage larger oscillations
|-
| 28
| FPGA/CLK_IN
| "XTAL1" per the data sheet<br>This is the 20MHz clock input<br>Also connects to the FPGA's clock input
|-
| 29*
| DGND
| This is not a pin but rather the base of the CP2201 package.<br>It is connected to the DGND plane for thermal relief
|}