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SiPM Amplifier Optimization (view source)
Revision as of 00:30, 4 February 2009
, 00:30, 4 February 2009no edit summary
# minimized pulse duration for higher running rates
# minimized pulse duration for higher running rates
# minimized power consumption
# minimized power consumption
== Design Requirements ==
=== Gain ===
The amplifier provided by Photonique with a gain of roughly 3 kΩ was well suited for single photon counting. However, for typical signals ranging in the hundreds of SiPM pixels, this gain excessive. However, the option of switching back to single photon detection for the purposes of calibration would be a nice feature.
The initial approach to this problem of gain switching was just that suggested by Photonique documentation: turning up the amplifier supply voltage. With the transistors' maximal voltage rating of 15 V taken as high gain setting, some simulations done to assess the amplifier performance.
The amplifier provided by Photonique with a gain of roughly 3 kΩ was well suited for single photon counting. However, for typical signals ranging in the hundreds of SiPM pixels, this gain excessive. However, the option of switching back to single photon detection for the purposes of calibration would be a nice feature. The initial approach to this problem of gain switching was just that suggested by Photonique documentation: turning up the amplifier supply voltage. With the transistors' maximal voltage rating of 15 V taken as high gain setting, some simulations done to assess the amplifier performance. The following problems were found in this approach:
The amplifier provided by Photonique with a gain of roughly 3 kΩ was well suited for single photon counting. However, for typical signals ranging in the hundreds of SiPM pixels, this gain excessive. However, the option of switching back to single photon detection for the purposes of calibration would be a nice feature. The initial approach to this problem of gain switching was just that suggested by Photonique documentation: turning up the amplifier supply voltage. With the transistors' maximal voltage rating of 15 V taken as high gain setting, some simulations done to assess the amplifier performance. The following problems were found in this approach:
* Component values necessary for high gain are not suitable for stable, <math>\beta</math>-independent design
* Component values necessary for high gain are not suitable for stable, <math>\beta</math>-independent design
* Input impedance of the amplifier increase significantly in the high gain design. On the other hand, the effective impedance and therefore pulse shape varies with supply voltage.
* Input impedance of the amplifier increase significantly in the high gain design. On the other hand, the effective impedance and therefore pulse shape varies with supply voltage.
A low-impedance input stage was designed to alleviate the last issue, but the rest remained serious concerns and challenges. An alternate design was adapted in which the summing stage further amplifies the signal. Now, however, instead of doing this with supply