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The Xilinx Spartan-3A FPGA we will be using on the SiPM control board can be programmed using any of several modes. This table, adapted from the [http://www.xilinx.com/support/documentation/user_guides/ug332.pdf User Guide], Table 2-1, shows the available programming modes and how to select them by setting the M[2:0] pins on the FPGA.
For information about the other pins used in the programming process, see [[SiPM digital control board netlist]].
{| cellspacing=3 border=1 |
|'''M[2:0]'''
|'''Programming Mode'''
|----
|<0:0:0>
|Master serial (platform flash) mode
|----
|<0:0:1>
|Master SPI mode
|----
|<0:1:0>
|BPI up
|----
|<0:1:1>
|''Reserved''
|----
|<1:0:0>
|''Reserved''
|----
|<1:0:1>
|JTAG mode
|----
|<1:1:0>
|Slave parallel mode
|----
|<1:1:1>
|Slave serial mode
|----
|}
For information about the other pins used in the programming process, see [[SiPM digital control board netlist]].
{| cellspacing=3 border=1 |
|'''M[2:0]'''
|'''Programming Mode'''
|----
|<0:0:0>
|Master serial (platform flash) mode
|----
|<0:0:1>
|Master SPI mode
|----
|<0:1:0>
|BPI up
|----
|<0:1:1>
|''Reserved''
|----
|<1:0:0>
|''Reserved''
|----
|<1:0:1>
|JTAG mode
|----
|<1:1:0>
|Slave parallel mode
|----
|<1:1:1>
|Slave serial mode
|----
|}