Changes

FPGA Transmitter (view source)

1 byte added , 19:15, 3 June 2008

m

no edit summary

Line 36: Line 36:

* ''ADCReg_Q'': [in] 16-bit (front-padded 12-bit) ADC register value

* ''DACReg_Addr'': [out] 5-bit DAC register address bus

−

* ''DACReg_Q : [in] 16-bit (front-padded 14-bit) DAC register value

+

* ''DACReg_Q'': [in] 16-bit (front-padded 14-bit) DAC register value

1,004

edits