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:''See also [[Programming_the_Ethernet_controller|Programming the Ethernet Controller]]'' for a survey of modules and a general discussion of FPGA design approach.''
= (011) Read Packet =
= (011) Read Packet =
== Programming Details ==
== Programming Details ==
[[Image:PacketFormat.png|thumb|520px|Custom format of the packets exchanged between digital control boards and the PC.]]
[[Image:PacketFormat.png|thumb|325px|Custom format of the packets exchanged between digital control boards and the PC.]]
The module is implemented as a counter of bytes read with the auto-read interface of the Ethernet Controller chip (EC) starting from the beginning of the header. ''AutoRd'' module is instantiated and is pulsed on each counter click. Upon reading the 15th, the location is checked for match to the board slot's hardwired location (''LocStamp'' port listed below). Upon the 16th byte, the packet type is checked. Packet rejection (skipping in the receive buffer) if performed by writing "00000010" to RXCN (0x11) control register. (See the CP220x manual for more information.) ''wrToAddr'' module is instantiated and is pulsed by the Discard signal which may be turned high at any point of the selection process.
The module is implemented as a counter of bytes read with the auto-read interface of the Ethernet Controller chip (EC) starting from the beginning of the header. ''AutoRd'' module is instantiated and is pulsed on each counter click. Upon reading the 15th, the location is checked for match to the board slot's hardwired location (''LocStamp'' port listed below). Upon the 16th byte, the packet type is checked. Packet rejection (skipping in the receive buffer) if performed by writing "00000010" to RXCN (0x11) control register. (See the CP220x manual for more information.) ''wrToAddr'' module is instantiated and is pulsed by the Discard signal which may be turned high at any point of the selection process.