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Design of the control board is an ongoing project, so more questions may be added later.
Design of the control board is an ongoing project, so more questions may be added later.
* Size of the FPGA in terms of logic gates and I/O pins. For more detail, see [[SiPM_digital_control_board#The_FPGA|the section on the FPGA]].
* Size of the FPGA in terms of logic gates and I/O pins. For more detail, see [[SiPM_digital_control_board#The_FPGA|the section on the FPGA]].
* Number of SiPMs per digital control card. For more detail, see [[SiPM_digital_control_board#The_DAC|the section on the DAC]].
== Responsibilities of the control board ==
== Responsibilities of the control board ==
=== The DAC ===
=== The DAC ===
The purpose of the control board is to allow remotely programmable bias voltages for the SiPMs. For this purpose a DAC is required. The current design of the tagger microscope calls for 16 SiPMs per electronics card. Various designs were considered, but based on availability of components in the 50V range (DACs and op-amps primarily) the most suitable choice found was the Analog Devices' AD5535. It can go up to 200V with a resolution of 14 bit (roughly 12mV at 200V scale, roughly 3mV at a 50V scale) on 32 channels. As there are so many channels built in to this system, the tagger may be slightly restructured so as to include 32 SiPMs per board instead of 16 per board. This DAC defines its own serial interface for communication with the FPGA.
The purpose of the control board is to allow remotely programmable bias voltages for the SiPMs. For this purpose a DAC is required. The current design of the tagger microscope calls for 16 SiPMs per electronics card, however designs of up to 24 SiPMs per electronics card are being considered. Various designs were studied, but based on availability of components in the 50V range (DACs and op-amps primarily) the most suitable choice found was the Analog Devices' AD5535. It can go up to 200V with a resolution of 14 bit (roughly 12mV at 200V scale, roughly 3mV at a 50V scale) on 32 channels. As there are so many channels built in to this system, the tagger may be slightly restructured so as to include up to 32 SiPMs per board instead of 16 per board. This DAC defines its own serial interface for communication with the FPGA.
The data sheet and other information regarding the DAC can be downloaded from the [http://www.analog.com/en/prod/0%2C2877%2CAD5535%2C00.html Analog Devices website].
The data sheet and other information regarding the DAC can be downloaded from the [http://www.analog.com/en/prod/0%2C2877%2CAD5535%2C00.html Analog Devices website].