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{| align="right" width="100px" style="text-align:center"
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{| align="right" width="100px" style="text-align:center" cellspacing="0"
|+ '''VHDL Tutorial'''
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! colspan="2" style="background:#ffff66" | VHDL Tutorial
 
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| colspan="2" | You are on the index page.
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| colspan="2" style="background:#ffff99" | A brief guide to VHDL design with a design example; the introduction and core of the tutorial.
 
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| [[VHDL: Enter the code monkey|< prev]] || [[VHDL: Xilinx ISE|next >]]
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| style="background:#ffff66" | [[VHDL: Enter the code monkey|< prev]]  
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| style="background:#ffff66" | [[VHDL: Xilinx ISE|next >]]
 
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