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FPGA programming using a hardware description language is not a commonly taught skill in physics programs, but is a necessary skill for designing the electronics required for this project. This tutorial aims to layout the design process and teach the basics of VHDL.
FPGA programming using a hardware description language is not a commonly taught skill in physics programs, but is a necessary skill for designing the electronics required for this project. This tutorial aims to layout the design process and teach the basics of hardware description language; in particular [http://en.wikipedia.org/wiki/Vhdl VHDL]. The main competitor to VHDL is [http://en.wikipedia.org/wiki/Verilog Verilog]; tutorials and information regarding Verilog can be found through Google web searching.
== Design example ==
To illustrate the discussions in this tutorial, a design example is discussed along the way. The design example is the [[http://zeus.phys.uconn.edu/wiki/index.php?title=Programming_the_FPGA#Emulator_.28D.29|emulator for the AD5535 DAC]]. As each step of the design process is discussed, the DAC emulator will be used for illustration.
== Where to start ==
The first part of the design process is completely independent of any code. The first step is to define the "black box" of your circuit; that is, draw a box and say what goes in and what comes out. VHDL allows three types of ''pins'' (connections to the outside world):
* '''in''': An ''in'' pin can be read from but never written to.
* '''out''': An ''out'' pin can be written to but never read from.
* '''inout''': An ''inout'' pin can be both read from and written to, providing the flexibility to allow bidirectional communication on a single line. At first this seems the ideal choice and that you would always want inout pins; in actual fact you want to avoid inout pins unless you absolutely need them for bidirectional communication.
Having defined your block box, you need to fill in your black box.
== VHDL Resolution Table ==
{| style="text-align:center"
{| style="text-align:center"