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[[FPGA_Reusables|Miscellaneous Reusable Components]]
 
[[FPGA_Reusables|Miscellaneous Reusable Components]]
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== (111) Transmit "D" ==
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This block loads a "D" to the transmit buffer then loops 32 (or 24 or 16) times to load the locally stored DAC channel values to the transmit buffer.  Once the full packet has been loaded, it sends the packet, then transitions to state 010.
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inputs
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* ''Clk'': clock
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* ''/Rst'': asynchronous, active-low reset
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* ''State'': 3-bit state value
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internal signals
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* ''S_En'': state enable, ''S_En'' <= not (''St(2)'' or ''St(1)'' or ''St(0)'')
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* ''Go'': when ''S_En'' goes high ''Go'' pulses for one cycle
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blocks
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* '''Loader'''
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** Loads the DAC values into a packet in the transmission buffer of the CP2200/1.  Loops through all values and loads them in order (channel zero to channel thirty-one).
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** inputs
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*** ''Clk'': clock
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*** ''/Rst'': asynchronous, active-low reset
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*** ''Go'': pulse to begin loading a packet
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*** ''TxRx_Done'': ''Done'' signal on transceiver
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*** ''Data'': 14-bit data bus from internal registers
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** outputs
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*** ''TxRx_Go'': ''Go'' signal on transceiver
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*** ''TxRx_RW'': ''R/W'' signal on transceiver
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*** ''TxRx_A'': ''A_in'' bus on transceiver
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*** ''TxRx_D'': ''D_in'' bus on transceiver
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*** ''Done'': pulse to signal completion
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* '''Sender'''
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** Tells CP2200/1 to send the packet
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** inputs
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*** ''Clk'': clock
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*** ''/Rst'': asynchronous, active-low reset
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*** ''Go'': pulse to begin, connected to ''Done'' signal from Loader
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*** ''TxRx_Done'': ''Done'' signal from transceiver
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** outputs
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*** ''TxRx_Go'': ''Go'' signal on transceiver
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*** ''TxRx_RW'': ''R/W'' signal on transceiver
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*** ''TxRx_A'': ''A_in'' bus on transceiver
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*** ''TxRx_D'': ''D_in'' bus on transceiver
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*** ''Done'': pulse to signal completion
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*** ''New_St'': 3-bit bus of new state to write to state register; goes to 010 when ''Done'' is high
      
= Emulator =
 
= Emulator =
1,004

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