FPGA programming modes

From UConn PAN
Revision as of 16:44, 24 June 2008 by Underwood (talk | contribs)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

The Xilinx Spartan-3A FPGA we will be using on the SiPM control board can be programmed using any of several modes. This table, adapted from the User Guide, Table 2-1, shows the available programming modes and how to select them by setting the M[2:0] pins on the FPGA.

For information about the other pins used in the programming process, see SiPM digital control board netlist.

M[2:0] Programming Mode
<0:0:0> Master serial (platform flash) mode
<0:0:1> Master SPI mode
<0:1:0> BPI up
<0:1:1> Reserved
<1:0:0> Reserved
<1:0:1> JTAG mode
<1:1:0> Slave parallel mode
<1:1:1> Slave serial mode