Difference between revisions of "Design and prototyping of SiPM electronics"

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* Upload [[Programming the ADC|ADC module]] block diagrams
 
* Upload [[Programming the ADC|ADC module]] block diagrams
 
* <s>Combine [[Programming the ADC|ADC]] & [[Programming the temperature sensor|temperature sensor]] into single "SPI" module</s>
 
* <s>Combine [[Programming the ADC|ADC]] & [[Programming the temperature sensor|temperature sensor]] into single "SPI" module</s>
* [[Reset and Initialization|Reset module]]
+
[[Programming_the_Ethernet_controller#.28000.29_Reset_Cycle|Ethernet module]]
** Execute on startup
+
* Complete [[Programming the Ethernet controller|Ethernet controller module]] and perform tests with all components together
** Execute on command
 
** Soft reset - load and report MAC and location addresses.
 
** <S>Integrate with/''combine into'' existing modules</S> ''update'': integrated into [[Programming_the_Ethernet_controller#.28000.29_Reset_Cycle|Ethernet module]]
 
* Complete [[Programming the Ethernet controller|Ethernet controller module]]
 
 
** <s>Registers</s>
 
** <s>Registers</s>
 
** <s>Idler</s>
 
** <s>Idler</s>
Line 48: Line 44:
 
** <s>Transmitter</s>
 
** <s>Transmitter</s>
 
** <s>Transceiver</s>, extra debugging quasi-emulators in progress
 
** <s>Transceiver</s>, extra debugging quasi-emulators in progress
 +
** [[Reset and Initialization|Reset module]]
 +
*** Execute on startup
 +
*** Execute on command
 +
*** Soft reset - load and report MAC and location addresses.
 +
*** <S>Integrate with/''combine into'' existing modules</S> ''update'': integrated into
 +
 
* Integrate all modules
 
* Integrate all modules
 
* Determine size of FPGA
 
* Determine size of FPGA

Revision as of 04:42, 13 November 2007

This page is a work in progress. More information will be added as the project progresses.

Internal Links

Analog amplifier

Digital control

Programming our FPGA

VHDL in general

  • VHDL tutorial - a brief guide to VHDL design with a design example; the introduction and core of the tutorial.

To-do list

Ethernet module

  • Complete Ethernet controller module and perform tests with all components together
    • Registers
    • Idler
    • Reader
    • Querier
    • Programmer
    • Transmitter
    • Transceiver, extra debugging quasi-emulators in progress
    • Reset module
      • Execute on startup
      • Execute on command
      • Soft reset - load and report MAC and location addresses.
      • Integrate with/combine into existing modules update: integrated into
  • Integrate all modules
  • Determine size of FPGA
  • Design or purchase connector to bus board
  • Purchase all components (including EEPROM, RJ-45 female jack, etc)
  • Obtain footprints of all chips, connectors, jacks, etc
  • PCB layout
  • Prototype PCB
  • Design bus board
  • Design analog board