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− | = Amplifier Boards = | + | == Amplifier Boards == |
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− | == Analog Amplifier == | + | === Analog Amplifier === |
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| The suitability of commercially-available SiPMs are currently being evaluated with "AMP_0604" amplifier by [http://www.photonique.ch/ Photonique]. | | The suitability of commercially-available SiPMs are currently being evaluated with "AMP_0604" amplifier by [http://www.photonique.ch/ Photonique]. |
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− | == Eventual Design Considerations == | + | === Eventual Design Considerations === |
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| A similar amplifier circuit will be designed for every SiPM channel on the board. Those corresponding to a single column will be summed at some stage. Each board, however, will have the capacity for a column of independent channels, since the design of the tagger calls for five such columns in the array. | | A similar amplifier circuit will be designed for every SiPM channel on the board. Those corresponding to a single column will be summed at some stage. Each board, however, will have the capacity for a column of independent channels, since the design of the tagger calls for five such columns in the array. |
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− | = Digital Control Boards = | + | == Digital Control Boards == |
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− | * [[SiPM digital control board]] - digital PCB for controlling the SiPMs.
| + | === Design Tree === |
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− | ==== Programming our FPGA ====
| + | * [[SiPM digital control board]] - design of the digital PCB for controlling the SiPMs. |
| + | ** [[Programming the FPGA]] - central page for programming the FPGA. |
| + | *** [[Programming the Ethernet controller]] - discussion of the design for the Ethernet controller. |
| + | **** [[Reset and Initialization]] - discussion of the design for the reset and initialization part of the core |
| + | **** [[Ethernet packets]] - a detail of the packets we intend to use on our network. |
| + | *** [[Programming the DAC]] - discussion of the design for the DAC. |
| + | *** [[Programming the SPI]] - discussion of the hybrid module that controls both the ADC and the temperature sensor over a single SPI bus. This design incorporates the (now obsolete) predecessor modules: |
| + | **** [[Programming the temperature sensor]] - discussion of the design for the temperature sensor. |
| + | **** [[Programming the ADC]] - discussion of the design for the ADC. |
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− | * [[Programming the FPGA]] - central page for programming the FPGA.
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− | ** [[Programming the DAC]] - discussion of the design for the DAC.
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− | ** [[Programming the SPI]] - discussion of the new hybrid module that controls both the ADC and the temperature sensor over a single SPI bus.
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− | *** [[Programming the temperature sensor]] - discussion of the design for the temperature sensor.
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− | *** [[Programming the ADC]] - discussion of the design for the ADC.
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− | ** [[Programming the Ethernet controller]] - discussion of the design for the Ethernet controller.
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− | *** [[Ethernet packets]] - a detail of the packets we intend to use on our network.
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− | ** [[Reset and Initialization]] - discussion of the design for the reset and initialization core.
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− | ==== VHDL in general ====
| + | === VHDL Overview === |
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| * [[VHDL tutorial]] - a brief guide to VHDL design with a design example; the introduction and core of the tutorial. | | * [[VHDL tutorial]] - a brief guide to VHDL design with a design example; the introduction and core of the tutorial. |
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| ** [[VHDL: The real code]] - section three of the tutorial, focusing on coding the body of your design. | | ** [[VHDL: The real code]] - section three of the tutorial, focusing on coding the body of your design. |
| ** [[VHDL: Xilinx ISE]] - section four of the tutorial, focusing on using the development environment. | | ** [[VHDL: Xilinx ISE]] - section four of the tutorial, focusing on using the development environment. |
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| == To-do list == | | == To-do list == |