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Line 23: − + − * [[SiPM digital control board]] - digital PCB for controlling the SiPMs.+ − ==== Programming our FPGA ====+ + + + + + + + + − * [[Programming the FPGA]] - central page for programming the FPGA. − ** [[Programming the DAC]] - discussion of the design for the DAC. − ** [[Programming the SPI]] - discussion of the new hybrid module that controls both the ADC and the temperature sensor over a single SPI bus. − *** [[Programming the temperature sensor]] - discussion of the design for the temperature sensor. − *** [[Programming the ADC]] - discussion of the design for the ADC. − ** [[Programming the Ethernet controller]] - discussion of the design for the Ethernet controller. − *** [[Ethernet packets]] - a detail of the packets we intend to use on our network. − ** [[Reset and Initialization]] - discussion of the design for the reset and initialization core. − ==== VHDL in general ====+ Line 45:
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Design and prototyping of SiPM electronics (view source)
Revision as of 22:00, 5 June 2008
, 22:00, 5 June 2008no edit summary
= Amplifier Boards =
== Amplifier Boards ==
== Analog Amplifier ==
=== Analog Amplifier ===
The suitability of commercially-available SiPMs are currently being evaluated with "AMP_0604" amplifier by [http://www.photonique.ch/ Photonique].
The suitability of commercially-available SiPMs are currently being evaluated with "AMP_0604" amplifier by [http://www.photonique.ch/ Photonique].
== Eventual Design Considerations ==
=== Eventual Design Considerations ===
A similar amplifier circuit will be designed for every SiPM channel on the board. Those corresponding to a single column will be summed at some stage. Each board, however, will have the capacity for a column of independent channels, since the design of the tagger calls for five such columns in the array.
A similar amplifier circuit will be designed for every SiPM channel on the board. Those corresponding to a single column will be summed at some stage. Each board, however, will have the capacity for a column of independent channels, since the design of the tagger calls for five such columns in the array.
= Digital Control Boards =
== Digital Control Boards ==
=== Design Tree ===
* [[SiPM digital control board]] - design of the digital PCB for controlling the SiPMs.
** [[Programming the FPGA]] - central page for programming the FPGA.
*** [[Programming the Ethernet controller]] - discussion of the design for the Ethernet controller.
**** [[Reset and Initialization]] - discussion of the design for the reset and initialization part of the core
**** [[Ethernet packets]] - a detail of the packets we intend to use on our network.
*** [[Programming the DAC]] - discussion of the design for the DAC.
*** [[Programming the SPI]] - discussion of the hybrid module that controls both the ADC and the temperature sensor over a single SPI bus. This design incorporates the (now obsolete) predecessor modules:
**** [[Programming the temperature sensor]] - discussion of the design for the temperature sensor.
**** [[Programming the ADC]] - discussion of the design for the ADC.
=== VHDL Overview ===
* [[VHDL tutorial]] - a brief guide to VHDL design with a design example; the introduction and core of the tutorial.
* [[VHDL tutorial]] - a brief guide to VHDL design with a design example; the introduction and core of the tutorial.
** [[VHDL: The real code]] - section three of the tutorial, focusing on coding the body of your design.
** [[VHDL: The real code]] - section three of the tutorial, focusing on coding the body of your design.
** [[VHDL: Xilinx ISE]] - section four of the tutorial, focusing on using the development environment.
** [[VHDL: Xilinx ISE]] - section four of the tutorial, focusing on using the development environment.
== To-do list ==
== To-do list ==