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| '''Trigger Interface''' | | '''Trigger Interface''' |
| + | A PCI Trigger Interface Card resides in slot 2. The PCI interface is a PLX 9056, running 32-bit at 66MHz, and in a PCI interface. The PCI is connected an FPGA (Field Programmable Gate Array), and this configuration supports only 32-bit read and write transactions (burst or non-burst). |
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| + | The board mounted in the halldtrg5 crate consists of the |
| + | PCI interface, the FPGA, the Trigger Supervisor interface, and the Local Trigger Interface. |
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| + | The Local Trigger interface allows an external trigger to be connected to the Trigger Interface, via the front panel. In my initial tests, I connected a function generator to this external trigger interface. |
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| + | The Trigger Supervisor Interface, on the front panel of the Trigger Interface below the Local Trigger, allows connection to readout controllers (ROC). |
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| + | In either case, information from either of the front panel trigger interfaces is passed to the FPGA. This communicates with the PCI interface on the board, and thus with the CPU. |
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| '''F-ADC''' | | '''F-ADC''' |