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→Final Results of Design Project
==Summary of Spring 2009 Work==
==Summary of Spring 2009 Work==
At the end of the fall semester, Dr. Jones, Igor, and I determined that the amplifier/summing circuit we had designed simply didn’t have sufficient performance characteristics to be useful for GlueX. During the beginning of the spring semester, Igor came up with a new design, utilizing more transistors, to provide the high gain, fain response, picoseconds resolution amplifier that we needed. The design performed flawlessly both in MatLab simulations and in a handmade single channel prototype. The first of my goals for the spring 2009 semester was to capture the schematic for this new amplifier into Altium designer, and layout a new amplifier board. The second of my goals, of course, was to complete production of the digital control board prototypes.
At the end of the fall semester, Dr. Jones, Igor, and I determined that the amplifier/summing circuit we had designed simply didn’t have sufficient performance characteristics to be useful for GlueX. During the beginning of the spring semester, Igor came up with a new design, utilizing more transistors, to provide the high gain, fast response, picosecond resolution amplifier that we needed. The design performed flawlessly both in MatLab simulations and in a handmade single channel prototype. The first of my goals for the spring 2009 semester was to capture the schematic for this new amplifier into Altium designer, and layout a new amplifier board. The second of my goals, of course, was to complete production of the digital control board prototypes.
[[Image:Digital Board, Populated.JPG|thumb|The populated digital board, with a tube of Chap-Block<sup>TM</sup> for size comparison.]] Since the fall semester left us with three unpopulated digital control board PCBs, getting those PCBs assembled with their components was the first priority. I began the semester by tracking down all of the components we needed (some of which were selected at the end of the fall semester), and making appropriate substitutions for components whose availability had changed since the fall. In the process of selecting these components, I noticed several places where it seemed like power consumption on the board may be somewhat high. To fix this, I developed a spreadsheet in Microsoft Excel that calculates optimal resistor values to use for to obtain a specified voltage divider stiffness. With this tool, I was able to optimize power consumption across the board, and select appropriate components. Once all components had been selected, ordered, and received, we sent the order out to Screamin’ Circuits for assembly. The boards came back several weeks later, and are currently awaiting testing by some undergraduates who will be in the lab this summer.
[[Image:Digital Board, Populated.JPG|thumb|The populated digital board, with a tube of Chap-Block<sup>TM</sup> for size comparison.]] Since the fall semester left us with three unpopulated digital control board PCBs, getting those PCBs assembled with their components was the first priority. I began the semester by tracking down all of the components we needed (some of which were selected at the end of the fall semester), and making appropriate substitutions for components whose availability had changed since the fall. In the process of selecting these components, I noticed several places where it seemed like power consumption on the board may be somewhat high. To fix this, I developed a spreadsheet in Microsoft Excel that calculates optimal resistor values to use for to obtain a specified voltage divider stiffness. With this tool, I was able to optimize power consumption across the board, and select appropriate components. Once all components had been selected, ordered, and received, we sent the order out to Screamin’ Circuits for assembly. The boards came back several weeks later, and are currently awaiting testing by some undergraduates who will be in the lab this summer.
While Igor was finalizing his amplifier/summing circuit, I worked briefly on design of the backplane. A number of details regarding trace impedance and board dimensions were ironed out. Nonetheless, many problems still remain which I will need to tackle over the summer. The first of these problems is that we have yet to find an appropriate low cost coaxial connector to route signals off the backplane. In addition, screws with which to mount the backplane to the tagger must be selected so that appropriate holes can be created for them on the PCB.
While Igor was finalizing his amplifier/summing circuit, I worked briefly on design of the backplane. A number of details regarding trace impedance and board dimensions were ironed out. Nonetheless, many problems still remain which I will need to tackle over the summer. The first of these problems is that we have yet to find an appropriate low cost coaxial connector to route signals off the backplane. In addition, screws with which to mount the backplane to the tagger must be selected so that appropriate holes can be created for them on the PCB.
Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, check it out here.
Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, [http://zeus.phys.uconn.edu/halld/glueXposters/woody-frontiers-2009.pdf check it out here].
[[Image:Amplifier-Summer-Laid-out.gif|thumb|A prototype layout of 5 amplifier channels and a summing circuit. Actual size is ~1.6" tall. Areas in green represent problems to be resolved over summer 2009. A prototype amplifier with no green spots has been designed and will be replicated to this design soon.]] To start the amplifier/summing circuit project, I searched high and low for information about how to handle multi-channel designs in Altium. Not surprisingly, the first Google result on the query “multichannel design Altium” had everything I was missing during the fall when I was trying to lay out the original amplifier circuit. Using my new knowledge of Altium’s multichannel capabilities, I captured Igor’s new design into the schematics editor of Altium Designer. With proper nested schematic sheets, the entire 30 channel amplifier/6 channel summer design was compressed into just 4 schematic sheets, vs. the ~40 or so that would have been required had I laid out the complete schematics of the old design.
[[Image:Amplifier-Summer-Laid-out.gif|thumb|A prototype layout of 5 amplifier channels and a summing circuit. Actual size is ~1.6" tall. Areas in green represent problems to be resolved over summer 2009. A prototype amplifier with no green spots has been designed and will be replicated to this design soon.]] To start the amplifier/summing circuit project, I searched high and low for information about how to handle multi-channel designs in Altium. Not surprisingly, the first Google result on the query “multichannel design Altium” had everything I was missing during the fall when I was trying to lay out the original amplifier circuit. Using my new knowledge of Altium’s multichannel capabilities, I captured Igor’s new design into the schematics editor of Altium Designer. With proper nested schematic sheets, the entire 30 channel amplifier/6 channel summer design was compressed into just 4 schematic sheets, vs. the ~40 or so that would have been required had I laid out the complete schematics of the old design.
I spent about a week and a half trying to figure out how to handle nesting independent nets from a repeated subsheet into another repeated subsheet which also produces independent nets from the nets of the first sheet. This sounds somewhat complicated, and I suppose perhaps it is a somewhat unique situation, since none of the ~5 sample multichannel projects included with Altium had such a construction in them. Basically, each summing circuit has five amplifier subcircuits, each of which puts out its own signal independent of the other four. From the perspective of the entire board, there are 6 summers, each of which has five independent signals coming from the amplifiers, and one summed signal. Determining how to get Altium to realize the proper connections from each individual amplifier, through that amplifier’s summer, to the main schematic was a complicated mess of naming conventions, but eventually I was able to make Altium reflect all of the appropriate connections in the PCB view. Though there are a few net naming issues still to be resolved, this problem has mostly been ironed out.
I spent about a week and a half trying to figure out how to handle nesting independent nets from a repeated subsheet into another repeated subsheet which also produces independent nets from the nets of the first sheet. This sounds somewhat complicated, and I suppose perhaps it is a somewhat unique situation, since none of the ~5 sample multichannel projects included with Altium had such a construction in them. Basically, each summing circuit has five amplifier subcircuits, each of which puts out its own signal independent of the other four. From the perspective of the entire board, there are 6 summers, each of which has five independent signals coming from the amplifiers, and one summed signal. Determining how to get Altium to realize the proper connections from each individual amplifier, through that amplifier’s summer, to the main schematic was a complicated mess of naming conventions, but eventually I was able to make Altium reflect all of the appropriate connections in the PCB view. Though there are a few net naming issues still to be resolved, this problem has mostly been ironed out.
The final few weeks of the semester were spent laying out components in the PCB view of Altium. As of right now, a compact design for an amplifier measuring 0.183”x~1.3” has been completed. Making use of 0201 size components, this amplifier is approximately .2” shorter than the old design, despite incorporating an extra transistor. The amplifier design features an isolating ground trace running the length of the amplifier to prevent crosstalk between channels. A prototype layout of the summing circuit has also been completed, though some layout issues there remain to be resolved over the summer.
The final few weeks of the semester were spent laying out amplifier components in the PCB view of Altium. As of right now, a compact design for an amplifier measuring 0.183”x~1.3” has been completed. Making use of 0201 size components, this amplifier is approximately .2” shorter than the old design, despite incorporating an extra transistor. The amplifier design features an isolating ground trace running the length of the amplifier to prevent crosstalk between channels. A prototype layout of the summing circuit has also been completed, though some layout issues there remain to be resolved over the summer.
===Related Files===
===Related Files===
*Progress20090505.zip
*[http://zeus.phys.uconn.edu/halld/tagger/electronics/design-6-2009/Progress20090505.zip Design Snapshot 5/5/2009]
**Backplane
**Backplane
***Backplane.PrjPcb (Altium Project File)
***Backplane.PrjPcb (Altium Project File)
****The bottom left corner of the PCB view shows a proof-of-concept 5 amplifiers/1 summer layout.
****The bottom left corner of the PCB view shows a proof-of-concept 5 amplifiers/1 summer layout.
****Finding AMP6 using the PDF bookmarks shows the prototype amplifier layout that resolves mismatched footprint issues (indicated in green in the image farther up on this page).
****Finding AMP6 using the PDF bookmarks shows the prototype amplifier layout that resolves mismatched footprint issues (indicated in green in the image farther up on this page).
== Summary of Fall 2009 Work ==
=== Mid-Semester Update, 11/12/2009 ===
We now have one fully working prototype of the SiPM Digital Control Board, and the SiPM Amplifier Board is currently being manufactured and assembled by Sierra Circuits, Inc. The backplane design is nearly complete and will be going out for quoting within a week.
Here is a zip file containing the most recent versions of the tagger files: [http://zeus.phys.uconn.edu/halld/tagger/electronics/design-11-2009/TaggerMicroscopeProgress20091112.zip Design Snapshot 11/12/2009]
A few notes about these files:
*There are four subfolders in the zip file. The folders for the three PCBs are clearly labelled. Each PCB folder has one project file (.PrjPcb) which can be opened in Altium Designer. Each project file refers to only one PcbDoc file, making it easy to figure out what you should look at to see the board.
*The SiPM digital control board project has 4 shelved polygons which should be restored (Tools->Polygon Pours->Restore 4 shelved polyons) to see the state of the board as it was last manufactured. Revisions from the testing process have not yet been entered into Altium but can be reviewed on this wiki: [[Digital control board debugging notes]]
*The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
=== End of Semester Update ===
This semester, a lot of progress has been made on the tagger electronics. The digital control board is now onto revision 2.0, the amplifier board is in production, and the backplane is awaiting completion of the purchase order for production to begin. It is exciting to say that the bulk of the work is now finally complete. Remaining for the spring are the tasks of testing the amplifier board, and seeing that everything fits into the backplane. Here are some details about what I accomplished this semester, as well as links to the most recent project files.
==== Digital Control Board ====
The semester began with the digital control board prototypes sitting on lab bench waiting to be tested. My job was primarily to design the boards, not to debug them, though I still played an integral part in the testing process. We were all relieved that none of the boards appeared to smoke immediately when we first applied power, though there were a few confusing problems that had to be sorted out. Most of these problems are described in detail on the [[Digital control board debugging notes]] page. More or less, we had to solder a pin that wasn't connected, replace the crystal oscillator with a CMOS oscillator, and rewire few traces that were accidentally connected to pins intended for other signals. I won't repeat all of the changes we made here since it would be redundant to the page that already discusses it, but the important part is that we have one board that is fully operational, and the version 2.0 schematics/layout reflecting all these changes are complete. I anticipate that production of the version 2.0 boards will occur at the beginning of the spring 2010 semester.
There is still one lingering problem with the digital board design that has not yet been resolved, however. Even after all of the version 2.0 changes were implemented on the version 1.0 boards, only one of the three boards produced actually functioned properly. For a reason unknown to us, two of the boards ended up with their digital to analog converters burning up and smoking. We thoroughly reviewed the schematics and the layout, and found nothing miswired. Furthermore, we analyzed the placement of the ball grid array DAC to the best of our ability, and determined that a misalignment of balls is not the cause of the failure. All of our power supplies are stable, properly decoupled, and grounded as called for by DAC's manufacturer. Currently, the best hypothesis for the failure of 2 of the 3 DACs is that one or more of the absolute maximum ratings must have been exceeded at some point during the assembly process. Analog Devices lists fairly specific specs with small tolerances relating to maximum temperature and the length of time which the DAC may spend inside a reflow oven. We are currently working with the assembly company to attempt to determine exactly what caused the failure. They plan to reexamine the DAC BGAs on heir x-ray machine, and also perform other testing to determine if the assembly process caused the failure.
==== Amplifier Board ====
Throughout the summer and the beginning of the fall semester, I completed the design for the SiPM Amplifier Board, version 1.0. All 30 channels have been implemented along with their summing circuits. As I mentioned in the mid semester update above, this board is being manufactured and assembled by Sierra Circuits, Inc. Some unexpected setbacks occurred in the assembly process that delayed the boards somewhat, but I believe everything is now on track for delivery of the finished product before the start of the spring semester. A number of problems relating to minimum quantities of parts, as well as part naming conventions have now been resolved, and the assembly process should be complete in several weeks.
==== Backplane ====
The backplane design, version 1.0, has also been completed. Sierra Circuits will be manufacturing the backplane, which we will assemble ourselves. The backplane is a particularly interesting PCB from a manufacturing standpoint, because it is designed to be completely light proof. Since the backplane is the only material standing between the whole of Hall D and the inside of the tagger microscope dark box, opacity of the board is particularly important.
Most PCBs with internal copper layers are already fairly opaque, because the copper blocks light from transmitting through the FR-4 and prepreg. Through hole components do not particulary compromise board opacity, because the holes are plugged with component pins and solder. What does have a greater affect on the opaqueness of a board, however, is the thermal reliefs by which through hole pins and vias connect to internal plane layers. These reliefs are designed to aid in the soldering process by minimizing the amount of copper that is directly connected to the plating in the hole. A typical relief consists of four 7-10 mil traces connecting the hole's plating to the internal plane. The plane itself remains about 20 mil away from the hole, to prevent conduction of heat during the soldering process. Unfortunately, this means that there is a small gap in which there is only FR-4 to stop light from passing through the board. Since FR-4 is transparent, this poses a problem for our design. We were able work with Sierra Circuits to come up with a board design that includes an internal layer of special black FR-4 to prevent light leakage through the heat reliefs. While this is certainly not a standard feature, Sierra was confident that they could implement it for us, and we look forward to testing the boards' opacity in the spring.
==== Project Design Snapshot ====
Here is a link to the most recent project files: [http://zeus.phys.uconn.edu/halld/tagger/electronics/design-12-2009/Tagger%20Microscope%20Progress%2020091217.zip Tagger Progress, December 17, 2009]
A few notes about these files:
*There are four subfolders in the zip file. The folders for the three PCBs are clearly labelled. Each PCB folder has one project file (.PrjPcb) which can be opened in Altium Designer. Each project file refers to only one PcbDoc file, making it easy to figure out what you should look at to see the board.
*The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelled with the date 20091212 in the Amplifier Board folder.
==== Final Results of Design Project ====
Here is a link to the final project files produced by Woody:
[http://zeus.phys.uconn.edu/halld/tagger/electronics/design-5-2010 smart pdf's].