| Line 32: |
Line 32: |
| | | ±0.25V | | | ±0.25V |
| | | 2.7mA max operating | | | 2.7mA max operating |
| | + | | Analog supply |
| | | AVDD can be as low as 2.7V if voltages measured never exceed 2.5V | | | AVDD can be as low as 2.7V if voltages measured never exceed 2.5V |
| | |} | | |} |
| Line 68: |
Line 69: |
| | | AD7928 | | | AD7928 |
| | | VDRIVE | | | VDRIVE |
| − | | ??? CMOS logic tolerance | + | | ±0.3V |
| | | 200uA | | | 200uA |
| | | Logic output driver | | | Logic output driver |
| Line 93: |
Line 94: |
| | | Digital supply pin | | | Digital supply pin |
| | | | | | |
| | + | |- |
| | + | | XC3S50A |
| | + | | VCCAUX |
| | + | | ±0.3V |
| | + | | Varies |
| | + | | Auxiliary power supply |
| | + | | FPGA program greatly affects power requirements |
| | + | |- |
| | + | | XC3S50A |
| | + | | VCCO |
| | + | | ±0.3V |
| | + | | Varies |
| | + | | Auxiliary power supply |
| | + | | FPGA program greatly affects power requirements |
| | + | |- |
| | + | | XCF01S |
| | + | | VCCINT |
| | + | | ±0.3V |
| | + | | 10mA max operating |
| | + | | Internal supply |
| | + | | |
| | + | |- |
| | + | | XCF01S |
| | + | | VCCO |
| | + | | ±0.3V |
| | + | | 10mA max operating |
| | + | | Digital output supply |
| | + | | Serial mode |
| | |- | | |- |
| | |} | | |} |
| | | | |
| | + | === ICs requiring +2.5V === |
| | + | {| cellspacing=3 border=1 | |
| | + | |'''IC Name''' |
| | + | |'''Pin Name''' |
| | + | |'''Tolerance''' |
| | + | |'''Current Requirements''' |
| | + | |'''Description''' |
| | + | |'''Notes''' |
| | + | |- |
| | + | | AD7928 |
| | + | | REF_IN |
| | + | | ±1% (±0.025V) |
| | + | | ±1uA max |
| | + | | Reference voltage |
| | + | | |
| | + | |- |
| | + | |} |
| | | | |
| − | === +3.3V supply === | + | === ICs requiring +1.2V === |
| | + | {| cellspacing=3 border=1 | |
| | + | |'''IC Name''' |
| | + | |'''Pin Name''' |
| | + | |'''Tolerance''' |
| | + | |'''Current Requirements''' |
| | + | |'''Description''' |
| | + | |'''Notes''' |
| | + | |- |
| | + | | XC3S50A |
| | + | | VCCINT |
| | + | | ±0.06V |
| | + | | Varies |
| | + | | Internal logic supply |
| | + | | FPGA program greatly affects power requirements |
| | + | |- |
| | + | |} |
| | | | |
| − | Use for:
| + | == -5V supply == |
| − | *AD5535 DAC
| + | {| cellspacing=3 border=1 | |
| − | **ANODE
| + | |'''IC Name''' |
| − | ***Used for temperature monitoring. Voltage drop across a temperature sensitive diode allows AD7928 to measure internal temperature of AD5535. External resistor on AD5535 CATHODE will help to limit current draw.
| + | |'''Pin Name''' |
| − | **REF_IN supply
| + | |'''Tolerance''' |
| − | ***Using +3.3V for REF_IN limits the SiPM amplifier bias voltages to a maximum of 165V. If greater variability is needed (up to +200V max), a separate +4V supply can be used for REF_IN, perhaps taken from the +5V rail via a voltage divider.
| + | |'''Current Requirements''' |
| − | *AD7314 temperature sensor
| + | |'''Description''' |
| − | **VDD supply
| + | |'''Notes''' |
| − | ***indicates ±1°C accuracy
| + | |- |
| − | ***should make compatible with 3.3V CMOS logic
| + | | AD5535 |
| − | *AD7928 ADC
| + | | V- |
| − | **VDRIVE output driver supply
| + | | ±0.25V |
| − | *CP2201 Ethernet
| + | | 2.5mA typ, 3.5mA max |
| − | **AV+ analog supply
| + | | Negative amplifier supply |
| − | **VDD1 digital supply
| + | | |
| − | **VDD2 digital supply
| + | |- |
| − | *FPGA
| + | |} |
| − | **VCCAUX auxiliary supply
| |
| − | ***Can also operate at +2.5V
| |
| − | **VCCO I/O logic supply
| |
| − | ***Makes it compatible with 3.3V CMOS logic
| |
| − | ***Puts it within acceptable range of voltages for communication with other ICs
| |
| − | *XCF01S EEPROM
| |
| − | **VCCINT internal supply
| |
| − | **VCCO output driver
| |
| − | ***Matches 3.3V I/O on FPGA
| |
| − | **VCCJ JTAG output driver
| |
| − | ***''Are we using this?''
| |
| − | *AD5535 DAC
| |
| − | **V+ amplifier supply pins
| |
| − | **AVCC analog supply pins
| |
| − | **DVCC digital supply pins
| |
| − | *AD7928 ADC
| |
| − | **AVDD pins
| |
| − | ***indicates measuring range of 0 to 2xREF_IN voltage
| |
| | | | |
| − | === +1.2V supply ===
| + | == +210V supply == |
| − | | + | {| cellspacing=3 border=1 | |
| − | Use for:
| + | |'''IC Name''' |
| − | *FPGA
| + | |'''Pin Name''' |
| − | **VCCINT internal logic supply
| + | |'''Tolerance''' |
| − | | + | |'''Current Requirements''' |
| − | === +2.5V supply ===
| + | |'''Description''' |
| − | | + | |'''Notes''' |
| − | Use for:
| + | |- |
| − | *AD7928 ADC
| + | | AD5535 |
| − | **REF_IN reference supply
| + | | VPP |
| − | ***Must be accurate to ±1%
| + | | large |
| − | | + | | Depends on SiPM specs |
| − | | + | | Supply for SiPM bias voltages |
| − | | + | | SiPM bias voltage current requirements are not currently on the wiki. Most likely, this is used more as a reference and less as a power supply. |
| − | === +5V supply ===
| + | |- |
| − | Use for:[[Image:AD5535 Power Supply Diagram.gif|thumb|Suggested AD5535 power supply connections taken from AD5535 data sheet.]]
| + | |} |
| − | *AD5535 DAC
| |
| − | **V+ amplifier supply pins
| |
| − | **AVCC analog supply pins
| |
| − | **DVCC digital supply pins
| |
| − | *AD7928 ADC
| |
| − | **AVDD pins
| |
| − | ***indicates measuring range of 0 to 2xREF_IN voltage
| |
| − | | |
| − | === -5V supply ===
| |
| − | Use for:
| |
| − | *AD5535 DAC
| |
| − | **V- amplifier supply pins
| |
| − | | |
| − | === +210V supply ===
| |
| − | Use for:
| |
| − | *AD5535 DAC
| |
| − | **VPP high voltage supply
| |
| − | ***Using this high voltage will allow for large adjustments of the SiPM amplifier bias voltages. Large variations may be necessary because the MATLAB model showed that adjustments between 0 and +50V had [[SiPM_Amplifier#Bias_voltage |no effect]] on the SiPM.
| |