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SiPM digital control board netlist (view source)
Revision as of 19:58, 24 June 2008
, 19:58, 24 June 2008→Configuration Pins: added link to diagram of connections
These pins are used for the programming of the FPGA. Many of these pins revert to user I/O pins after programming is complete.
These pins are used for the programming of the FPGA. Many of these pins revert to user I/O pins after programming is complete.
We will be using the master serial (Platform Flash) programming mode (see [[FPGA programming modes]]). Configuration pins not used in this mode are omitted from the table below.
We will be using the master serial (Platform Flash) programming mode (see [[FPGA programming modes]]). Configuration pins not used in this mode are omitted from the table below. The connections that are in the table are also visually described on page 16 of the [http://www.xilinx.com/support/documentation/data_sheets/ds123.pdf XCF01S data sheet].
{| cellspacing=3 border=1 |
{| cellspacing=3 border=1 |
|'''Pin Name'''
|'''Pin Name'''