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SiPM digital control board netlist (view source)
Revision as of 19:31, 24 June 2008
, 19:31, 24 June 2008→Custom I/O pins: renamed section
This section defines some pins that must be on the FPGA, and what they must connect to. Many of these connections may also be found in the [[#IC netlist|IC netlist]].
This section defines some pins that must be on the FPGA, and what they must connect to. Many of these connections may also be found in the [[#IC netlist|IC netlist]].
=== Custom I/O pins ===
=== User I/O pins ===
For these I/O pins, "Pin Name" defines the name of the pins as they will be used for our project, not the actual pin name in the FPGA schematic. The physical FPGA pins used for each of these connections will be determined later to optimize the circuitry around the FPGA.
For these I/O pins, "Pin Name" defines the name of the pins as they will be used for our project, not the actual pin name in the FPGA schematic. The physical FPGA pins used for each of these connections will be determined later to optimize the circuitry around the FPGA.