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:''See also [[Programming_the_Ethernet_controller|Programming the Ethernet Controller]]'' for a survey of modules and a general discussion of FPGA design approach.''
= (010) Idler =
= (010) Idler =
== Programming Details ==
== Programming Details ==
The Idler is essentially a state-conscious wrapper around an ''INTCatcher'' module instatiation to which the interrupt mask "1000" is passed (selecting the "Rx FIFO non-empty" interrupt as opposed to "Self-Initialization Complete" etc.) INTCatcher only returns a "Done" pulse when the requested interrupt was found so the change of state to "Read" (011) is set to trigger on this "Done" signal.
=== Ports ===
=== Ports ===
* ''TxRx_Go'': [out] "Go" signal to read an EC control register byte
* ''TxRx_Go'': [out] "Go" signal to read an EC control register byte
* ''TxRX_RiW'': [out] active-high read, active-low write flag
* ''TxRX_RiW'': [out] active-high read, active-low write flag
* ''TxRx_Aout'': [out] _VECTOR (7 downto 0);
* ''TxRx_Aout'': [out] EC control register address (8-bit)