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Line 242:
Line 242: − *** ''T_Done'': goes high when reset/initialization process is complete, falls on ''Go'' pulse Line 250:
Line 249: − *** ''T_Done'': high when temperature sensor is done polling − ** internal signals − *** ''Flag'' <= ''A_done'' and ''T_Done'' − + +
Programming the Ethernet controller (view source)
Revision as of 16:30, 19 July 2007
, 16:30, 19 July 2007→(100) Poll Status
** outputs
** outputs
*** - All temperature sensor control lines -
*** - All temperature sensor control lines -
*** ''Data'': 10-bit data bus to carry data to FPGA internal registers
*** ''Data'': 10-bit data bus to carry data to FPGA internal registers
* '''Coordinator'''
* '''Coordinator'''
*** ''/Rst'': asynchronous, active-low reset
*** ''/Rst'': asynchronous, active-low reset
*** ''A_Done'': high when ADC is done polling
*** ''A_Done'': high when ADC is done polling
** outputs
** outputs
*** ''Done'': when ''Flag'' goes high, ''Done'' pulses for one cycle; connects to state register as an enable
*** ''Done'': when ''A_Done'' goes high, ''Done'' pulses for one cycle; connects to state register as an enable
**: Note that the temperature sensor does not signal completion. That is because the temperature sensor need only update one value, while the ADC must update eight values. Thus it is known ahead of time that the temperature sensor will already be done by the time the ADC is done.
*** ''New_St'': new state to be written to the state register; goes to 101 while ''Done'' is high
*** ''New_St'': new state to be written to the state register; goes to 101 while ''Done'' is high