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Programming the Ethernet controller (view source)
Revision as of 15:33, 19 July 2007
, 15:33, 19 July 2007→(011) Read Packet
=== (011) Read Packet ===
=== (011) Read Packet ===
Block 011 is the first block with switching between following states. Its first task is to load the MAC data of the packet. If filtering inside of the FPGA is required, this block is responsible for it. The only MAC filtering likely to be needed is a check to see if the destination MAC address matches the MAC address of the CP2200/1, but the CP2200/1 should filter this itself (verify in the data sheet). If the packet is bad, this block tells the CP2200/1 to skip the packet and returns to block 010. The MAC filter would be the first substate.
After MAC filtering comes the second substate (or the only substate if MAC filtering is found to be unnecessary). This reads the first byte of the packet's data and uses it as a switch to determine the transition to the next state:
{| align="center" cellpadding="4" border="0" cellspacing="0" style="text-align:center"
! ASCII
|
! Next State
|-
| R || || 000
|-
| Q || || 100
|-
| P || || 110
|-
| other || || 010
|}
Anything other than the three defined packets is considered a bad packet and is discarded in the CP2200/1 before transitioning back to state 010. An "R" packet obtains the reset mask from the second byte then discards the packet before transitioning to state 000. State 000 assumes that the reset mask is held, so this output needs to be latched in place until the next time this block activates. "Q" and "P" packets simply transition to the next state, allowing the following states to access the rest of the packet.
=== (100) Poll Status ===
=== (100) Poll Status ===