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Programming the Ethernet controller
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Revision as of 14:36, 19 July 2007
60 bytes added
,
14:36, 19 July 2007
→(000) Reset Cycle
Line 35:
Line 35:
inputs
inputs
+
* ''Clk'': clock
+
* ''/Rst'': asynchronous, active-low reset
* ''State'': 3-bit state value
* ''State'': 3-bit state value
* ''D_En'': DAC enable, assume held high/low by previous block
* ''D_En'': DAC enable, assume held high/low by previous block
Krueger
461
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