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Initial plan for topology of the SPI-based bus used to connect the temperature sensor and the ADC to the FPGA. Note that in proper SPI bus nomenclature SDI and SDO would be swapped on the master (master's input is slave's output and vice-versa), but were
Initial plan for topology of the SPI-based bus used to connect the temperature sensor and the ADC to the FPGA. Note that in proper SPI bus nomenclature SDI and SDO would be swapped on the master (master's input is slave's output and vice-versa), but were not swapped here for simplicity.