Woody Underwood - Revision history

Jonesrt: /* Final Results of Design Project */

2010-05-15T18:50:55Z

Final Results of Design Project

Jonesrt: /* Project Design Snapshot */

2010-05-15T18:50:40Z

Project Design Snapshot

Jonesrt: /* Summary of Spring 2009 Work */

2010-03-23T12:36:38Z

Summary of Spring 2009 Work

Jonesrt: /* Summary of Spring 2009 Work */

2010-03-23T12:35:37Z

Summary of Spring 2009 Work

Underwood: /* Project Design Snapshot */

2010-03-18T21:41:05Z

Project Design Snapshot

Underwood: /* Project Design Snapshot */

2010-03-18T21:39:43Z

Project Design Snapshot

Underwood: /* Digital Control Board */ added that we are working with screaming circuits

2009-12-21T03:52:21Z

Digital Control Board: added that we are working with screaming circuits

Underwood: /* Project Design Snapshot */ typo

2009-12-17T22:22:20Z

Project Design Snapshot: typo

Underwood: /* Project Design Snapshot */

2009-12-17T22:22:02Z

Project Design Snapshot

Underwood: /* Summary of Fall 2009 Work */

2009-12-17T22:19:13Z

Summary of Fall 2009 Work

← Older revision		Revision as of 18:50, 15 May 2010
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	Here is a link to the final project files produced by Woody:		Here is a link to the final project files produced by Woody:
	[http://zeus.phys.uconn.edu/halld/tagger/electronics/design-5-2010 smart pdf's].		[http://zeus.phys.uconn.edu/halld/tagger/electronics/design-5-2010 smart pdf's].
−	[

← Older revision		Revision as of 18:50, 15 May 2010
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	*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.		*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
	*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelled with the date 20091212 in the Amplifier Board folder.		*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelled with the date 20091212 in the Amplifier Board folder.
		+
		+	==== Final Results of Design Project ====
		+	Here is a link to the final project files produced by Woody:
		+	[http://zeus.phys.uconn.edu/halld/tagger/electronics/design-5-2010 smart pdf's].
		+	[

@@ Line 81: / Line 81: @@
 While Igor was finalizing his amplifier/summing circuit, I worked briefly on design of the backplane. A number of details regarding trace impedance and board dimensions were ironed out. Nonetheless, many problems still remain which I will need to tackle over the summer. The first of these problems is that we have yet to find an appropriate low cost coaxial connector to route signals off the backplane. In addition, screws with which to mount the backplane to the tagger must be selected so that appropriate holes can be created for them on the PCB.
-Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, [http://zeus.phys.uconn.edu/halld/glueXposters/woody-frontiers-2009.ppt check it out here].
+Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, [http://zeus.phys.uconn.edu/halld/glueXposters/woody-frontiers-2009.pdf check it out here].
 [[Image:Amplifier-Summer-Laid-out.gif|thumb|A prototype layout of 5 amplifier channels and a summing circuit. Actual size is ~1.6" tall. Areas in green represent problems to be resolved over summer 2009. A prototype amplifier with no green spots has been designed and will be replicated to this design soon.]] To start the amplifier/summing circuit project, I searched high and low for information about how to handle multi-channel designs in Altium. Not surprisingly, the first Google result on the query “multichannel design Altium” had everything I was missing during the fall when I was trying to lay out the original amplifier circuit. Using my new knowledge of Altium’s multichannel capabilities, I captured Igor’s new design into the schematics editor of Altium Designer. With proper nested schematic sheets, the entire 30 channel amplifier/6 channel summer design was compressed into just 4 schematic sheets, vs. the ~40 or so that would have been required had I laid out the complete schematics of the old design.

@@ Line 81: / Line 81: @@
 While Igor was finalizing his amplifier/summing circuit, I worked briefly on design of the backplane. A number of details regarding trace impedance and board dimensions were ironed out. Nonetheless, many problems still remain which I will need to tackle over the summer. The first of these problems is that we have yet to find an appropriate low cost coaxial connector to route signals off the backplane. In addition, screws with which to mount the backplane to the tagger must be selected so that appropriate holes can be created for them on the PCB.
-Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, check it out here.
+Once we were satisfied that the amplifier/summing circuit performed as required, I shifted work from the backplane to the amplifier board. Around the same time, I began working on a poster to present my work at the Frontiers in Undergraduate Research Exhibition held during Open House Weekend here at UConn. If you’re interested in my poster, [http://zeus.phys.uconn.edu/halld/glueXposters/woody-frontiers-2009.ppt check it out here].
 [[Image:Amplifier-Summer-Laid-out.gif|thumb|A prototype layout of 5 amplifier channels and a summing circuit. Actual size is ~1.6" tall. Areas in green represent problems to be resolved over summer 2009. A prototype amplifier with no green spots has been designed and will be replicated to this design soon.]] To start the amplifier/summing circuit project, I searched high and low for information about how to handle multi-channel designs in Altium. Not surprisingly, the first Google result on the query “multichannel design Altium” had everything I was missing during the fall when I was trying to lay out the original amplifier circuit. Using my new knowledge of Altium’s multichannel capabilities, I captured Igor’s new design into the schematics editor of Altium Designer. With proper nested schematic sheets, the entire 30 channel amplifier/6 channel summer design was compressed into just 4 schematic sheets, vs. the ~40 or so that would have been required had I laid out the complete schematics of the old design.

@@ Line 135: / Line 135: @@
 ==== Project Design Snapshot ====
-Here is a link to the most project files: [http://zeus.phys.uconn.edu/halld/tagger/electronics/design-12-2009/Tagger%20Microscope%20Progress%2020091217.zip Tagger Progress, December 17, 2009]
+Here is a link to the most recent project files: [http://zeus.phys.uconn.edu/halld/tagger/electronics/design-12-2009/Tagger%20Microscope%20Progress%2020091217.zip Tagger Progress, December 17, 2009]
 A few notes about these files:

@@ Line 124: / Line 124: @@
 The semester began with the digital control board prototypes sitting on lab bench waiting to be tested. My job was primarily to design the boards, not to debug them, though I still played an integral part in the testing process. We were all relieved that none of the boards appeared to smoke immediately when we first applied power, though there were a few confusing problems that had to be sorted out. Most of these problems are described in detail on the [[Digital control board debugging notes]] page. More or less, we had to solder a pin that wasn't connected, replace the crystal oscillator with a CMOS oscillator, and rewire few traces that were accidentally connected to pins intended for other signals. I won't repeat all of the changes we made here since it would be redundant to the page that already discusses it, but the important part is that we have one board that is fully operational, and the version 2.0 schematics/layout reflecting all these changes are complete. I anticipate that production of the version 2.0 boards will occur at the beginning of the spring 2010 semester.
-There is still one lingering problem with the digital board design that has not yet been resolved, however. Even after all of the version 2.0 changes were implemented on the version 1.0 boards, only one of the three boards produced actually functioned properly. For a reason unknown to us, two of the boards ended up with their digital to analog converters burning up and smoking. We thoroughly reviewed the schematics and the layout, and found nothing miswired. Furthermore, we analyzed the placement of the ball grid array DAC to the best of our ability, and determined that a misalignment of balls is not the cause of the failure. All of our power supplies are stable, properly decoupled, and grounded as called for by DAC's manufacturer. Currently, the best hypothesis for the failure of 2 of the 3 DACs is that one or more of the absolute maximum ratings must have been exceeded at some point during the assembly process. Analog Devices lists fairly specific specs with small tolerances relating to maximum temperature and the length of time which the DAC may spend inside a reflow oven. We have run into some difficultly trying to find out from the boards' assembler whether they followed the published specs for the assembly process, but we intend to keep trying until the cause of the DAC failure has been resolved.
+There is still one lingering problem with the digital board design that has not yet been resolved, however. Even after all of the version 2.0 changes were implemented on the version 1.0 boards, only one of the three boards produced actually functioned properly. For a reason unknown to us, two of the boards ended up with their digital to analog converters burning up and smoking. We thoroughly reviewed the schematics and the layout, and found nothing miswired. Furthermore, we analyzed the placement of the ball grid array DAC to the best of our ability, and determined that a misalignment of balls is not the cause of the failure. All of our power supplies are stable, properly decoupled, and grounded as called for by DAC's manufacturer. Currently, the best hypothesis for the failure of 2 of the 3 DACs is that one or more of the absolute maximum ratings must have been exceeded at some point during the assembly process. Analog Devices lists fairly specific specs with small tolerances relating to maximum temperature and the length of time which the DAC may spend inside a reflow oven. We are currently working with the assembly company to attempt to determine exactly what caused the failure. They plan to reexamine the DAC BGAs on heir x-ray machine, and also perform other testing to determine if the assembly process caused the failure.
 ==== Amplifier Board ====

@@ Line 141: / Line 141: @@
 *The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
 *The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
-*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelle with the date 20091212 in the Amplifier Board folder.
+*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelled with the date 20091212 in the Amplifier Board folder.

← Older revision		Revision as of 22:22, 17 December 2009
Line 141:		Line 141:
	*The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.		*The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
	*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.		*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
		+	*The most recent bill of materials, which resolves all of the naming convention issues brought up by Sierra is labelle with the date 20091212 in the Amplifier Board folder.

← Older revision		Revision as of 22:19, 17 December 2009
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	Here is a link to the most project files: INSERT LINK TO DESIGN SNAPSHOT 12/17/2009 HERE		Here is a link to the most project files: INSERT LINK TO DESIGN SNAPSHOT 12/17/2009 HERE

−	The ~~files~~ are ~~all~~ clearly labelled.	+	A few notes about these files:
		+	*There are four subfolders in the zip file. The folders for the three PCBs are clearly labelled. Each PCB folder has one project file (.PrjPcb) which can be opened in Altium Designer. Each project file refers to only one PcbDoc file, making it easy to figure out what you should look at to see the board.
		+	*The SiPM amplifier (analog) board project will give an error message that it was unable to find "Test PCB.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.
		+	*The backplane project will give an error message that it was unable to find "Backplane_New.PcbDoc". Please ignore this. The file was intentionally omitted to prevent confusion, and is not related to the actual design.