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== Registers ==
 
== Registers ==
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=== State Register ===
 
=== State Register ===
 
A three-bit register to store the current state.
 
A three-bit register to store the current state.
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outputs
 
outputs
 
* ''Q'': 16-bit data-out bus (data pre-padded with 4 zeros to facilitate packaging into 2-byte words)
 
* ''Q'': 16-bit data-out bus (data pre-padded with 4 zeros to facilitate packaging into 2-byte words)
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=== DAC Registers ===
 
=== DAC Registers ===
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== Reusable Components ==
 
== Reusable Components ==
   −
Several components were found useful as reusable units rather than unique modules.
+
Several components were found useful as reusable units rather than unique modules. They are listed here roughly from the low level units to high level "wrappers".
 +
 
 +
=== Read Request (<tt>reqFromAddr</tt>) ===
 +
 
 +
Sends request for reading (R/W pin high) to the Transceiver at the specified address. (Optionally "Go" pulse can be appropriately delayed in this module to ensure that parameter signals sent to transceiver have gone through their transitions. Currently, these provisions are commented out, relying on clock falling edge latching of the sent data.) This unit is not intended for direct use, but rather to be the core of the fetcher components described here.
   −
=== Byte Fetcher (<tt>getByte</tt>) ===
     −
Fetches a byte of data from the Ethernet Controller control and data registers. This unit helps abstract and package the communication steps with the transceiver. The two step process of sending a request with all accompanying parameters and waiting for reply is now a matter of a single "call". Aside from packaging, the component ensures proper timing among the sent signals. The actual request is performed via the <tt>reqFromAddr</tt> unit described below.
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=== Write Request (<tt>wrToAddr</tt>) ===
   −
=== Auto-reader (<tt>AutoRd</tt>) ===
+
Sends a write request (R/W pin low) to transceiver at the specified address with the specified byte of data. The primary reason of this instruction "packaging" is to obscure the complexity of appropriate delays to ensure proper signal latching.
   −
Performs the same function as the Byte Fetcher (described above) but is hard-wired to address the RXAUTORD (0x01). This is convenient because the Ethernet Controller's AutoRead interface will be used extensively to parse through packets. <tt>AutoRd</tt> is in fact a wrapper around <tt>GetByte</tt> passing through all signals accept the fixed address input.
     −
=== Read Request (<tt>reqFromAddr</tt>) ===
+
=== Byte Fetcher (<tt>getByte</tt>) ===
   −
Sends request for reading (R/W pin high) to transceiver at the specified address. "Go" pulse is appropriately delayed to ensure that parameter signals sent to transceiver have gone through their transitions. This unit is not intended for direct use, but rather to be the core of the fetcher components described above.
+
Fetches a byte of data from the Ethernet Controller registers via the Transceiver. This unit creates yet another abstraction layer "in series" with the transceiver. The two step process of sending a request with all accompanying parameters and waiting for reply is now a matter of a single "call". Aside from packaging, the component ensures proper timing among the sent signals. The actual request is performed via the <tt>reqFromAddr</tt> unit described below.
   −
=== Write Request (<tt>wrToAddr</tt>) ===
     −
Sends a write request (R/W pin low) to transceiver at the specified address with the specified byte of data. The primary reason of this instruction "packaging" is to obscure the complexity of appropriate delays to ensure proper signal latching.
+
=== Auto-reader (<tt>AutoRd</tt>) ===
    +
Performs the same function as the Byte Fetcher (described above) but is hard-wired to address the RXAUTORD (0x01). This is convenient because the Ethernet Controller's AutoRead interface will be used extensively to parse through packets. <tt>AutoRd</tt> is in fact a wrapper around <tt>GetByte</tt> passing through all signals accept the fixed address input.
 
=== Miscellaneous Components ===
 
=== Miscellaneous Components ===
  
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