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== Open questions ==
== Open questions ==
* How will the FPGA obtain the MAC address of the PC?
== Structure of a packet ==
== Structure of a packet ==
[[Image:Ethernet packet.PNG|thumb|150px|right|A typical Ethernet packet.]]
[[Image:Ethernet packet.PNG|thumb|150px|right|A typical Ethernet packet.]]
To the right is a diagram depicting the structure of an Ethernet packet. On the left side of the diagram is marked the data that will be passed along to the FPGA to be parsed for commands.
=== Transmitting ===
To the right is a diagram depicting the structure of an Ethernet packet. On the left side is marked the blocks that must be defined by the FPGA to be passed to the CP2200/1. The first 8 bytes ("Preamble and Start Frame Delimiter") and last 4 bytes ("CRC") will be generated by the CP2200/1, so the FPGA need not even be aware of them. The first significant block is the 6-byte destination MAC address. The FPGA will have to store this (internally or using the RAM supplied by the CP2200/1) and then insert it into the appropriate place. The next block is the 6-byte source MAC address. Each CP2200/1 comes with a factory-set unique MAC address stored in the last page of Flash memory that will be used as the source MAC address. The next block is the 2-byte length block. This is the number of bytes of data, which can be as small as 46 or as large as 1,500. Then finally comes the data block, which must be padded to a minimum of 46 bytes but can not exceed 1,500 bytes.
=== Receiving ===
== Our packets ==
== Our packets ==