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Now that you've written your code and seen the RTL schematic (then fixed your code and seen the new RTL schematic and repeated that whole process a few times) it's time to see if it actually works. To do that you need to run a simulation. Unfortunately, it's not that easy; you first need to define a '''test bench waveform''' (.tbw) file.
Now that you've written your code and seen the RTL schematic (then fixed your code and seen the new RTL schematic and repeated that whole process a few times) it's time to see if it actually works. To do that you need to run a simulation. Unfortunately, it's not that easy; you first need to define a '''test bench waveform''' (.tbw) file.
[[Image:ISE - Make New TBW.PNG|thumb|right|125px|Dialog box for creating a new test bench waveform.]]
Go to '''Project > New Source''' and select "Test Bench Waveform." Give the file a name and choose a parent directory, then click next. The next dialog box will ask you which source file to associate with the text bench waveform file. Select the file you wish to text and click next. Verify the details you just selected and click finish. This will bring up the dialog box shown to the right. Chances are you won't need to change (or even worry about) most of that window. However in the bottom right corner you can see "Initial Length of Test Bench". The default value for that tends to be too small for a design of any size; I generally set it to 10,000. You can try to be clever and change it from 10,000 ns to 10<math>\mu</math>s, but it won't work; changing the time unit adjusts other values across the dialog box. So just type in "10000".