Design and prototyping of SiPM electronics

This page is a work in progress. More information will be added as the project progresses.

Analog amplifier

 * SiPM Amplifier - analog amplifier circuit supplied by Photonique for use with the SiPMs.
 * MATLAB amplifier in detail - more information regarding the implementation of the MATLAB-based simulation of the amplifier circuit.

Digital control

 * SiPM digital control board - digital PCB for controlling the SiPMs.

Programming our FPGA

 * Programming the FPGA - central page for programming the FPGA.
 * Programming the DAC - discussion of the design for the DAC.
 * Programming the SPI - discussion of the new hybrid module that controls both the ADC and the temperature sensor over a single SPI bus.
 * Programming the temperature sensor - discussion of the design for the temperature sensor.
 * Programming the ADC - discussion of the design for the ADC.
 * Programming the Ethernet controller - discussion of the design for the Ethernet controller.
 * Ethernet packets - a detail of the packets we intend to use on our network.
 * Reset and Initialization - discussion of the design for the reset and initialization core.

VHDL in general

 * VHDL tutorial - a brief guide to VHDL design with a design example; the introduction and core of the tutorial.
 * VHDL: Where to start - section one of the tutorial, focusing on preparing your design for coding.
 * VHDL: Enter the code monkey - section two of the tutorial, focusing on outlining the framework of your code.
 * VHDL: The real code - section three of the tutorial, focusing on coding the body of your design.
 * VHDL: Xilinx ISE - section four of the tutorial, focusing on using the development environment.

To-do list
Ethernet module
 * Upload ADC module block diagrams
 * Combine ADC & temperature sensor into single "SPI" module
 * Complete Ethernet controller module
 * Registers
 * Idler
 * Reader
 * Querier
 * Programmer
 * Transmitter
 * Transceiver, extra debugging quasi-emulators in progress
 * Reset module
 * Check all modules for proper async reset support
 * Execute on startup
 * Execute on command
 * Soft reset - load and report MAC and location addresses.


 * Integrate all modules and simulate the device as a whole
 * Determine size of FPGA
 * Design or purchase connector to bus board
 * Purchase all components (including EEPROM, RJ-45 female jack, etc)
 * Obtain footprints of all chips, connectors, jacks, etc
 * PCB layout
 * Prototype PCB
 * Design bus board
 * Design analog board