| FPGA_main Project Status (01/20/2014 - 11:41:01) | |||
| Project File: | Device.xise | Parser Errors: | No Errors |
| Module Name: | FPGA_main | Implementation State: | Programming File Generated |
| Target Device: | xc3s50a-4vq100 |
|
No Errors |
| Product Version: | ISE 14.6 |
|
257 Warnings (0 new) |
| Design Goal: | Balanced |
|
All Signals Completely Routed |
| Design Strategy: | Xilinx Default (unlocked) |
|
All Constraints Met |
| Environment: | System Settings |
|
0 (Timing Report) |
| Device Utilization Summary | [-] | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) | |
| Number of Slice Flip Flops | 630 | 1,408 | 44% | ||
| Number of 4 input LUTs | 1,146 | 1,408 | 81% | ||
| Number of occupied Slices | 702 | 704 | 99% | ||
| Number of Slices containing only related logic | 702 | 702 | 100% | ||
| Number of Slices containing unrelated logic | 0 | 702 | 0% | ||
| Total Number of 4 input LUTs | 1,195 | 1,408 | 84% | ||
| Number used as logic | 1,146 | ||||
| Number used as a route-thru | 49 | ||||
| Number of bonded IOBs | 37 | 68 | 54% | ||
| Number of BUFGMUXs | 2 | 24 | 8% | ||
| Number of DCMs | 1 | 2 | 50% | ||
| Number of STARTUPs | 1 | 1 | 100% | ||
| Number of STARTUP_SPARTAN3As | 1 | 1 | 100% | ||
| Number of RAMB16BWEs | 1 | 3 | 33% | ||
| Number of STARTUP_SPARTAN3Es | 1 | 1 | 100% | ||
| Average Fanout of Non-Clock Nets | 3.57 | ||||
| Performance Summary | [-] | |||
| Final Timing Score: | 0 (Setup: 0, Hold: 0) | Pinout Data: | Pinout Report | |
| Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
| Timing Constraints: | All Constraints Met | |||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Mon Jan 20 11:40:24 2014 | 0 | 253 Warnings (0 new) | 89 Infos (0 new) | |
| Translation Report | Current | Mon Jan 20 11:40:29 2014 | 0 | 0 | 0 | |
| Map Report | Current | Mon Jan 20 11:40:33 2014 | 0 | 1 Warning (0 new) | 4 Infos (0 new) | |
| Place and Route Report | Current | Mon Jan 20 11:40:46 2014 | 0 | 3 Warnings (0 new) | 2 Infos (0 new) | |
| Power Report | ||||||
| Post-PAR Static Timing Report | Current | Mon Jan 20 11:40:49 2014 | 0 | 0 | 6 Infos (0 new) | |
| Bitgen Report | Current | Mon Jan 20 11:40:55 2014 | 0 | 0 | 0 | |
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Report | Current | Mon Jan 20 11:40:56 2014 | |
| WebTalk Log File | Current | Mon Jan 20 11:41:00 2014 | |